arm64: dts: renesas: r8a7795: Fix register mappings on VSPs

The VSPD includes a CLUT on RPF2. Ensure that the register space is
mapped correctly to support this.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index ce85704976f0d3effdc9472a04d4a8c2fb46651f..9dc2b43e59f5e54ff9071ef2d1fe21af26059666 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -2208,7 +2208,7 @@
 
                vspd0: vsp@fea20000 {
                        compatible = "renesas,vsp2";
-                       reg = <0 0xfea20000 0 0x4000>;
+                       reg = <0 0xfea20000 0 0x8000>;
                        interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 623>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -2228,7 +2228,7 @@
 
                vspd1: vsp@fea28000 {
                        compatible = "renesas,vsp2";
-                       reg = <0 0xfea28000 0 0x4000>;
+                       reg = <0 0xfea28000 0 0x8000>;
                        interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 622>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -2248,7 +2248,7 @@
 
                vspd2: vsp@fea30000 {
                        compatible = "renesas,vsp2";
-                       reg = <0 0xfea30000 0 0x4000>;
+                       reg = <0 0xfea30000 0 0x8000>;
                        interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 621>;
                        power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;