ar71xx: add support for the OpenMesh OM2P-HS board
authorGabor Juhos <juhosg@openwrt.org>
Wed, 17 Oct 2012 08:26:01 +0000 (08:26 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Wed, 17 Oct 2012 08:26:01 +0000 (08:26 +0000)
Signed-off-by: Marek Lindner <lindner_marek@yahoo.de>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 33800

target/linux/ar71xx/base-files/etc/diag.sh
target/linux/ar71xx/base-files/etc/uci-defaults/leds
target/linux/ar71xx/base-files/lib/ar71xx.sh
target/linux/ar71xx/files/arch/mips/ath79/mach-om2p.c
target/linux/ar71xx/generic/profiles/openmesh.mk
target/linux/ar71xx/patches-3.3/613-MIPS-ath79-OM-om2p-hs-support.patch [new file with mode: 0644]

index c3f97345c62bcaabb631f5a095023938837e0d7f..c371a1f9dd5b556dbc61dcdd309dc80ef8a085a6 100755 (executable)
@@ -88,6 +88,7 @@ get_status_led() {
                status_led="nbg460n:green:power"
                ;;
        om2p | \
+       om2p-hs | \
        om2p-lc)
                status_led="om2p:blue:power"
                ;;
index cb4b682994186eb8df82f1b54ba2065b6c632ff9..ca912c70cff6b95da7f99cbdcf3fe8fcb7d9603f 100755 (executable)
@@ -78,6 +78,7 @@ nbg460n_550n_550nh)
        ;;
 
 om2p | \
+om2p-hs | \
 om2p-lc)
        ucidef_set_led_netdev "port1" "port1" "om2p:blue:wan" "eth0"
        ucidef_set_led_netdev "port2" "port2" "om2p:blue:lan" "eth1"
index f3c32555fe59bd7841b84456ca847309de7285a9..14bd581d24c50d0d775286f883e2a85b5db2cad4 100755 (executable)
@@ -237,6 +237,9 @@ ar71xx_board_detect() {
        *OM2P)
                name="om2p"
                ;;
+       *"OM2P HS")
+               name="om2p-hs"
+               ;;
        *"OM2P LC")
                name="om2p-lc"
                ;;
index faeb49a5106874b66b9af94d9b8a5f76d1c054ca..1855349a392d96024c88759316603720233f5c76 100644 (file)
@@ -174,3 +174,71 @@ static void __init om2p_lc_setup(void)
 }
 
 MIPS_MACHINE(ATH79_MACH_OM2P_LC, "OM2P-LC", "OpenMesh OM2P LC", om2p_lc_setup);
+
+
+static void __init om2p_hs_gmac_setup(void)
+{
+       void __iomem *base;
+       u32 t;
+
+       base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE);
+
+       t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
+
+       t &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0 |
+              AR934X_ETH_CFG_GMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE |
+              AR934X_ETH_CFG_SW_PHY_SWAP);
+
+       t |= AR934X_ETH_CFG_SW_PHY_SWAP;
+       __raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG);
+       t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG);
+
+       iounmap(base);
+}
+
+static void __init om2p_hs_setup(void)
+{
+       u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000);
+       u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN);
+       u8 *art = (u8 *)KSEG1ADDR(0x1ffc1000);
+
+       /* make lan / wan leds software controllable */
+       ath79_gpio_output_select(OM2P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO);
+       ath79_gpio_output_select(OM2P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO);
+
+       /* enable reset button */
+       ath79_gpio_output_select(OM2P_GPIO_BTN_RESET, AR934X_GPIO_OUT_GPIO);
+       ath79_gpio_function_enable(AR933X_GPIO_FUNC_JTAG_DISABLE);
+
+       om2p_leds_gpio[4].gpio = OM2P_GPIO_LED_WAN;
+       om2p_leds_gpio[5].gpio = OM2P_GPIO_LED_LAN;
+
+       ath79_register_m25p80(&om2p_lc_flash_data);
+       ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio),
+                                om2p_leds_gpio);
+       ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL,
+                                       ARRAY_SIZE(om2p_gpio_keys),
+                                       om2p_gpio_keys);
+
+       ath79_register_wmac(art, NULL);
+
+       om2p_hs_gmac_setup();
+       ath79_register_mdio(1, 0x0);
+
+       ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
+       ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);
+
+       /* GMAC0 is connected to the PHY0 of the internal switch */
+       ath79_switch_data.phy4_mii_en = 1;
+       ath79_switch_data.phy_poll_mask = BIT(0);
+       ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+       ath79_eth0_data.phy_mask = BIT(0);
+       ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
+       ath79_register_eth(0);
+
+       /* GMAC1 is connected to the internal switch */
+       ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+       ath79_register_eth(1);
+}
+
+MIPS_MACHINE(ATH79_MACH_OM2P_HS, "OM2P-HS", "OpenMesh OM2P HS", om2p_hs_setup);
index 88e37ee56c11b5e716ef32daadd8cabd7e37671e..975a7edf1dd5c68ff4cd68f87c8d4ee6fe64774e 100644 (file)
@@ -6,12 +6,12 @@
 #
 
 define Profile/OM2P
-       NAME:=OpenMesh OM2P/OM2P-LC
+       NAME:=OpenMesh OM2P/OM2P-HS/OM2P-LC
        PACKAGES:=kmod-ath9k om-watchdog
 endef
 
 define Profile/OM2P/Description
-       Package set optimized for the OpenMesh OM2P/OM2P-LC.
+       Package set optimized for the OpenMesh OM2P/OM2P-HS/OM2P-LC.
 endef
 
 $(eval $(call Profile,OM2P))
diff --git a/target/linux/ar71xx/patches-3.3/613-MIPS-ath79-OM-om2p-hs-support.patch b/target/linux/ar71xx/patches-3.3/613-MIPS-ath79-OM-om2p-hs-support.patch
new file mode 100644 (file)
index 0000000..801d795
--- /dev/null
@@ -0,0 +1,10 @@
+--- a/arch/mips/ath79/machtypes.h      2012-10-12 21:42:29.000000000 +0800
++++ b/arch/mips/ath79/machtypes.h      2012-10-12 21:43:28.000000000 +0800
+@@ -45,6 +45,7 @@
+       ATH79_MACH_MZK_W04NU,           /* Planex MZK-W04NU */
+       ATH79_MACH_MZK_W300NH,          /* Planex MZK-W300NH */
+       ATH79_MACH_NBG460N,             /* Zyxel NBG460N/550N/550NH */
++      ATH79_MACH_OM2P_HS,             /* OpenMesh OM2P-HS */
+       ATH79_MACH_OM2P_LC,             /* OpenMesh OM2P-LC */
+       ATH79_MACH_OM2P,                /* OpenMesh OM2P */
+       ATH79_MACH_PB42,                /* Atheros PB42 */