drm/amd/powerplay: add append_powerplay_table function

It needs to add append_powerplay_table function to program the smc_dpm_table for
PPTable_t.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kevin Wang <Kevin1.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index 69832458fd40b7c8bc6973fdf1faa6f53fc3da7b..fb5ca7136eb35d4640cf726d16952610b67ed15a 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -192,6 +192,7 @@ struct smu_context
 struct pptable_funcs {
        int (*store_powerplay_table)(struct smu_context *smu);
        int (*check_powerplay_table)(struct smu_context *smu);
+       int (*append_powerplay_table)(struct smu_context *smu);
        int (*get_smu_msg_index)(struct smu_context *smu, uint32_t index);
 };
 
@@ -273,6 +274,8 @@ struct smu_funcs
        ((smu)->ppt_funcs->store_powerplay_table ? (smu)->ppt_funcs->store_powerplay_table((smu)) : 0)
 #define smu_check_powerplay_table(smu) \
        ((smu)->ppt_funcs->check_powerplay_table ? (smu)->ppt_funcs->check_powerplay_table((smu)) : 0)
+#define smu_append_powerplay_table(smu) \
+       ((smu)->ppt_funcs->append_powerplay_table ? (smu)->ppt_funcs->append_powerplay_table((smu)) : 0)
 
 #define smu_msg_get_index(smu, msg) \
        ((smu)->ppt_funcs? ((smu)->ppt_funcs->get_smu_msg_index? (smu)->ppt_funcs->get_smu_msg_index((smu), (msg)) : -EINVAL) : -EINVAL)

diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index fd432fe86bc2d253d1e79206cf1d5518dffb9afc..1b82c254e5808f81ac214d3eb60f6f9a70d0b17f 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -520,6 +520,10 @@ static int smu_v11_0_parse_pptable(struct smu_context *smu)
                return -ENOMEM;
 
        ret = smu_store_powerplay_table(smu);
+       if (ret)
+               return -EINVAL;
+
+       ret = smu_append_powerplay_table(smu);
 
        return ret;
 }

diff --git a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
index 5e561ad88d7b969a4ce628ff58a6f814cac3d16e..6cdbb4ffe62e7f6fb19126f3eff77c99112d4bbd 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
@@ -148,6 +148,97 @@ static int vega20_store_powerplay_table(struct smu_context *smu)
        return 0;
 }
 
+static int vega20_append_powerplay_table(struct smu_context *smu)
+{
+       struct smu_table_context *table_context = &smu->smu_table;
+       PPTable_t *smc_pptable = table_context->driver_pptable;
+       struct atom_smc_dpm_info_v4_4 *smc_dpm_table;
+       int index, i, ret;
+
+       index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
+                                          smc_dpm_info);
+
+       ret = smu_get_atom_data_table(smu, index, NULL, NULL, NULL,
+                                     (uint8_t **)&smc_dpm_table);
+       if (ret)
+               return ret;
+
+       smc_pptable->MaxVoltageStepGfx = smc_dpm_table->maxvoltagestepgfx;
+       smc_pptable->MaxVoltageStepSoc = smc_dpm_table->maxvoltagestepsoc;
+
+       smc_pptable->VddGfxVrMapping = smc_dpm_table->vddgfxvrmapping;
+       smc_pptable->VddSocVrMapping = smc_dpm_table->vddsocvrmapping;
+       smc_pptable->VddMem0VrMapping = smc_dpm_table->vddmem0vrmapping;
+       smc_pptable->VddMem1VrMapping = smc_dpm_table->vddmem1vrmapping;
+
+       smc_pptable->GfxUlvPhaseSheddingMask = smc_dpm_table->gfxulvphasesheddingmask;
+       smc_pptable->SocUlvPhaseSheddingMask = smc_dpm_table->soculvphasesheddingmask;
+       smc_pptable->ExternalSensorPresent = smc_dpm_table->externalsensorpresent;
+
+       smc_pptable->GfxMaxCurrent = smc_dpm_table->gfxmaxcurrent;
+       smc_pptable->GfxOffset = smc_dpm_table->gfxoffset;
+       smc_pptable->Padding_TelemetryGfx = smc_dpm_table->padding_telemetrygfx;
+
+       smc_pptable->SocMaxCurrent = smc_dpm_table->socmaxcurrent;
+       smc_pptable->SocOffset = smc_dpm_table->socoffset;
+       smc_pptable->Padding_TelemetrySoc = smc_dpm_table->padding_telemetrysoc;
+
+       smc_pptable->Mem0MaxCurrent = smc_dpm_table->mem0maxcurrent;
+       smc_pptable->Mem0Offset = smc_dpm_table->mem0offset;
+       smc_pptable->Padding_TelemetryMem0 = smc_dpm_table->padding_telemetrymem0;
+
+       smc_pptable->Mem1MaxCurrent = smc_dpm_table->mem1maxcurrent;
+       smc_pptable->Mem1Offset = smc_dpm_table->mem1offset;
+       smc_pptable->Padding_TelemetryMem1 = smc_dpm_table->padding_telemetrymem1;
+
+       smc_pptable->AcDcGpio = smc_dpm_table->acdcgpio;
+       smc_pptable->AcDcPolarity = smc_dpm_table->acdcpolarity;
+       smc_pptable->VR0HotGpio = smc_dpm_table->vr0hotgpio;
+       smc_pptable->VR0HotPolarity = smc_dpm_table->vr0hotpolarity;
+
+       smc_pptable->VR1HotGpio = smc_dpm_table->vr1hotgpio;
+       smc_pptable->VR1HotPolarity = smc_dpm_table->vr1hotpolarity;
+       smc_pptable->Padding1 = smc_dpm_table->padding1;
+       smc_pptable->Padding2 = smc_dpm_table->padding2;
+
+       smc_pptable->LedPin0 = smc_dpm_table->ledpin0;
+       smc_pptable->LedPin1 = smc_dpm_table->ledpin1;
+       smc_pptable->LedPin2 = smc_dpm_table->ledpin2;
+
+       smc_pptable->PllGfxclkSpreadEnabled = smc_dpm_table->pllgfxclkspreadenabled;
+       smc_pptable->PllGfxclkSpreadPercent = smc_dpm_table->pllgfxclkspreadpercent;
+       smc_pptable->PllGfxclkSpreadFreq = smc_dpm_table->pllgfxclkspreadfreq;
+
+       smc_pptable->UclkSpreadEnabled = 0;
+       smc_pptable->UclkSpreadPercent = smc_dpm_table->uclkspreadpercent;
+       smc_pptable->UclkSpreadFreq = smc_dpm_table->uclkspreadfreq;
+
+       smc_pptable->FclkSpreadEnabled = smc_dpm_table->fclkspreadenabled;
+       smc_pptable->FclkSpreadPercent = smc_dpm_table->fclkspreadpercent;
+       smc_pptable->FclkSpreadFreq = smc_dpm_table->fclkspreadfreq;
+
+       smc_pptable->FllGfxclkSpreadEnabled = smc_dpm_table->fllgfxclkspreadenabled;
+       smc_pptable->FllGfxclkSpreadPercent = smc_dpm_table->fllgfxclkspreadpercent;
+       smc_pptable->FllGfxclkSpreadFreq = smc_dpm_table->fllgfxclkspreadfreq;
+
+       for (i = 0; i < I2C_CONTROLLER_NAME_COUNT; i++) {
+               smc_pptable->I2cControllers[i].Enabled =
+                       smc_dpm_table->i2ccontrollers[i].enabled;
+               smc_pptable->I2cControllers[i].SlaveAddress =
+                       smc_dpm_table->i2ccontrollers[i].slaveaddress;
+               smc_pptable->I2cControllers[i].ControllerPort =
+                       smc_dpm_table->i2ccontrollers[i].controllerport;
+               smc_pptable->I2cControllers[i].ThermalThrottler =
+                       smc_dpm_table->i2ccontrollers[i].thermalthrottler;
+               smc_pptable->I2cControllers[i].I2cProtocol =
+                       smc_dpm_table->i2ccontrollers[i].i2cprotocol;
+               smc_pptable->I2cControllers[i].I2cSpeed =
+                       smc_dpm_table->i2ccontrollers[i].i2cspeed;
+       }
+
+       return 0;
+}
+
 static int vega20_check_powerplay_table(struct smu_context *smu)
 {
        ATOM_Vega20_POWERPLAYTABLE *powerplay_table = NULL;
@@ -171,6 +262,7 @@ static int vega20_check_powerplay_table(struct smu_context *smu)
 static const struct pptable_funcs vega20_ppt_funcs = {
        .store_powerplay_table = vega20_store_powerplay_table,
        .check_powerplay_table = vega20_check_powerplay_table,
+       .append_powerplay_table = vega20_append_powerplay_table,
        .get_smu_msg_index = vega20_get_smu_msg_index,
 };