switch (entry->msi_attrib.type) {
case PCI_CAP_ID_MSI:
if (entry->msi_attrib.maskbit) {
- int pos;
- u32 mask_bits;
+ int pos;
+ u32 mask_bits;
pos = (long)entry->mask_base;
pci_read_config_dword(entry->dev, pos, &mask_bits);
}
static int msi_free_irq(struct pci_dev* dev, int irq);
+
static int msi_init(void)
{
static int status = -ENOMEM;
continue;
spin_unlock_irqrestore(&msi_lock, flags);
/* This pre-assigned MSI irq for this device
- already exits. Override dev->irq with this irq */
+ already exists. Override dev->irq with this irq */
dev->irq = irq;
return 0;
}
pci_write_config_word(dev, msi_control_reg(pos), save);
enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
}
-#endif
+#endif /* CONFIG_PM */
/**
* msi_capability_init - configure device's MSI capability structure
u32 data; /* 16 bits of msi message data */
};
-/* Heper functions */
+/* Helper functions */
extern void mask_msi_irq(unsigned int irq);
extern void unmask_msi_irq(unsigned int irq);
extern void read_msi_msg(unsigned int irq, struct msi_msg *msg);
-
extern void write_msi_msg(unsigned int irq, struct msi_msg *msg);
struct msi_desc {