[ARM] 5548/1: Add gpio api for w90p910 platform

Add gpio api for w90p910 platform.

Signed-off-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a930e5c5672c4c6b5bcf2624c971f2a0a7c1738b..013993c6ceea9248fbc4b1f14a38a2b890d79b5f 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -488,6 +488,8 @@ config ARCH_NS9XXX
 config ARCH_W90X900
        bool "Nuvoton W90X900 CPU"
        select CPU_ARM926T
+       select ARCH_REQUIRE_GPIOLIB
+       select GENERIC_GPIO
        help
                Support for Nuvoton (Winbond logic dept.) ARM9 processor,You
                can login www.mcuos.com or www.nuvoton.com to know more.

diff --git a/arch/arm/mach-w90x900/Makefile b/arch/arm/mach-w90x900/Makefile
index 947316a0a52f245c7a334a1b46625e0ddfca5d13..6287268cde4cf6ea8184cbd8ce12f328139b3588 100644 (file)
--- a/arch/arm/mach-w90x900/Makefile
+++ b/arch/arm/mach-w90x900/Makefile
@@ -4,7 +4,7 @@
 
 # Object file lists.
 
-obj-y                          := irq.o time.o mfp-w90p910.o
+obj-y                          := irq.o time.o mfp-w90p910.o gpio.o
 
 # W90X900 CPU support files
 

diff --git a/arch/arm/mach-w90x900/gpio.c b/arch/arm/mach-w90x900/gpio.c
new file mode 100644 (file)
index 0000000..c72e0df
--- /dev/null
+++ b/arch/arm/mach-w90x900/gpio.c
@@ -0,0 +1,154 @@
+/*
+ * linux/arch/arm/mach-w90p910/gpio.c
+ *
+ * Generic w90p910 GPIO handling
+ *
+ *  Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/clk.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+
+#include <mach/hardware.h>
+
+#define GPIO_BASE              (W90X900_VA_GPIO)
+#define GPIO_DIR               (0x04)
+#define GPIO_OUT               (0x08)
+#define GPIO_IN                        (0x0C)
+#define GROUPINERV             (0x10)
+#define GPIO_GPIO(Nb)          (0x00000001 << (Nb))
+#define to_w90p910_gpio_chip(c) container_of(c, struct w90p910_gpio_chip, chip)
+
+#define W90P910_GPIO_CHIP(name, base_gpio, nr_gpio)                    \
+       {                                                               \
+               .chip = {                                               \
+                       .label            = name,                       \
+                       .direction_input  = w90p910_dir_input,          \
+                       .direction_output = w90p910_dir_output,         \
+                       .get              = w90p910_gpio_get,           \
+                       .set              = w90p910_gpio_set,           \
+                       .base             = base_gpio,                  \
+                       .ngpio            = nr_gpio,                    \
+               }                                                       \
+       }
+
+struct w90p910_gpio_chip {
+       struct gpio_chip        chip;
+       void __iomem            *regbase;       /* Base of group register*/
+       spinlock_t              gpio_lock;
+};
+
+static int w90p910_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+       struct w90p910_gpio_chip *w90p910_gpio = to_w90p910_gpio_chip(chip);
+       void __iomem *pio = w90p910_gpio->regbase + GPIO_IN;
+       unsigned int regval;
+
+       regval = __raw_readl(pio);
+       regval &= GPIO_GPIO(offset);
+
+       return (regval != 0);
+}
+
+static void w90p910_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
+{
+       struct w90p910_gpio_chip *w90p910_gpio = to_w90p910_gpio_chip(chip);
+       void __iomem *pio = w90p910_gpio->regbase + GPIO_OUT;
+       unsigned int regval;
+       unsigned long flags;
+
+       spin_lock_irqsave(&w90p910_gpio->gpio_lock, flags);
+
+       regval = __raw_readl(pio);
+
+       if (val)
+               regval |= GPIO_GPIO(offset);
+       else
+               regval &= ~GPIO_GPIO(offset);
+
+       __raw_writel(regval, pio);
+
+       spin_unlock_irqrestore(&w90p910_gpio->gpio_lock, flags);
+}
+
+static int w90p910_dir_input(struct gpio_chip *chip, unsigned offset)
+{
+       struct w90p910_gpio_chip *w90p910_gpio = to_w90p910_gpio_chip(chip);
+       void __iomem *pio = w90p910_gpio->regbase + GPIO_DIR;
+       unsigned int regval;
+       unsigned long flags;
+
+       spin_lock_irqsave(&w90p910_gpio->gpio_lock, flags);
+
+       regval = __raw_readl(pio);
+       regval &= ~GPIO_GPIO(offset);
+       __raw_writel(regval, pio);
+
+       spin_unlock_irqrestore(&w90p910_gpio->gpio_lock, flags);
+
+       return 0;
+}
+
+static int w90p910_dir_output(struct gpio_chip *chip, unsigned offset, int val)
+{
+       struct w90p910_gpio_chip *w90p910_gpio = to_w90p910_gpio_chip(chip);
+       void __iomem *outreg = w90p910_gpio->regbase + GPIO_OUT;
+       void __iomem *pio = w90p910_gpio->regbase + GPIO_DIR;
+       unsigned int regval;
+       unsigned long flags;
+
+       spin_lock_irqsave(&w90p910_gpio->gpio_lock, flags);
+
+       regval = __raw_readl(pio);
+       regval |= GPIO_GPIO(offset);
+       __raw_writel(regval, pio);
+
+       regval = __raw_readl(outreg);
+
+       if (val)
+               regval |= GPIO_GPIO(offset);
+       else
+               regval &= ~GPIO_GPIO(offset);
+
+       __raw_writel(regval, outreg);
+
+       spin_unlock_irqrestore(&w90p910_gpio->gpio_lock, flags);
+
+       return 0;
+}
+
+static struct w90p910_gpio_chip w90p910_gpio[] = {
+       W90P910_GPIO_CHIP("GROUPC", 0, 16),
+       W90P910_GPIO_CHIP("GROUPD", 16, 10),
+       W90P910_GPIO_CHIP("GROUPE", 26, 14),
+       W90P910_GPIO_CHIP("GROUPF", 40, 10),
+       W90P910_GPIO_CHIP("GROUPG", 50, 17),
+       W90P910_GPIO_CHIP("GROUPH", 67, 8),
+       W90P910_GPIO_CHIP("GROUPI", 75, 17),
+};
+
+void __init w90p910_init_gpio(int nr_group)
+{
+       unsigned        i;
+       struct w90p910_gpio_chip *gpio_chip;
+
+       for (i = 0; i < nr_group; i++) {
+               gpio_chip = &w90p910_gpio[i];
+               spin_lock_init(&gpio_chip->gpio_lock);
+               gpio_chip->regbase = GPIO_BASE + i * GROUPINERV;
+               gpiochip_add(&gpio_chip->chip);
+       }
+}

diff --git a/arch/arm/mach-w90x900/include/mach/gpio.h b/arch/arm/mach-w90x900/include/mach/gpio.h
new file mode 100644 (file)
index 0000000..034da3e
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/gpio.h
@@ -0,0 +1,34 @@
+/*
+ * linux/arch/arm/mach-w90p910/include/mach/gpio.h
+ *
+ * Generic w90p910 GPIO handling
+ *
+ *  Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_W90P910_GPIO_H
+#define __ASM_ARCH_W90P910_GPIO_H
+
+#include <mach/hardware.h>
+#include <asm/irq.h>
+#include <asm-generic/gpio.h>
+
+#define gpio_get_value __gpio_get_value
+#define gpio_set_value __gpio_set_value
+#define gpio_cansleep  __gpio_cansleep
+
+static inline int gpio_to_irq(unsigned gpio)
+{
+       return gpio;
+}
+
+static inline int irq_to_gpio(unsigned irq)
+{
+       return irq;
+}
+
+#endif