cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
- W25Q128@0 {
+ flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
reg = <0>;
- SBL1@0 {
- label = "SBL1";
- reg = <0x0 0x20000>;
- read-only;
- };
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
- MIBIB@20000 {
- label = "MIBIB";
- reg = <0x20000 0x20000>;
- read-only;
- };
+ partition@0 {
+ label = "SBL1";
+ reg = <0x0 0x20000>;
+ read-only;
+ };
- SBL2@40000 {
- label = "SBL2";
- reg = <0x40000 0x40000>;
- read-only;
- };
+ partition@20000 {
+ label = "MIBIB";
+ reg = <0x20000 0x20000>;
+ read-only;
+ };
- SBL3@80000 {
- label = "SBL3";
- reg = <0x80000 0x80000>;
- read-only;
- };
+ partition@40000 {
+ label = "SBL2";
+ reg = <0x40000 0x40000>;
+ read-only;
+ };
- DDRCONFIG@100000 {
- label = "DDRCONFIG";
- reg = <0x100000 0x10000>;
- read-only;
- };
+ partition@80000 {
+ label = "SBL3";
+ reg = <0x80000 0x80000>;
+ read-only;
+ };
- SSD@110000 {
- label = "SSD";
- reg = <0x110000 0x10000>;
- read-only;
- };
+ partition@100000 {
+ label = "DDRCONFIG";
+ reg = <0x100000 0x10000>;
+ read-only;
+ };
- TZ@120000 {
- label = "TZ";
- reg = <0x120000 0x80000>;
- read-only;
- };
+ partition@110000 {
+ label = "SSD";
+ reg = <0x110000 0x10000>;
+ read-only;
+ };
- RPM@1a0000 {
- label = "RPM";
- reg = <0x1a0000 0x80000>;
- read-only;
- };
+ partition@120000 {
+ label = "TZ";
+ reg = <0x120000 0x80000>;
+ read-only;
+ };
- APPSBL@220000 {
- label = "APPSBL";
- reg = <0x220000 0x80000>;
- read-only;
- };
+ partition@1a0000 {
+ label = "RPM";
+ reg = <0x1a0000 0x80000>;
+ read-only;
+ };
- APPSBLENV@2a0000 {
- label = "APPSBLENV";
- reg = <0x2a0000 0x40000>;
- read-only;
- };
+ partition@220000 {
+ label = "APPSBL";
+ reg = <0x220000 0x80000>;
+ read-only;
+ };
- OLDART@2e0000 {
- label = "OLDART";
- reg = <0x2e0000 0x40000>;
- read-only;
- };
+ partition@2a0000 {
+ label = "APPSBLENV";
+ reg = <0x2a0000 0x40000>;
+ read-only;
+ };
- partition@320000 {
- label = "firmware";
- reg = <0x320000 0xc60000>;
- compatible = "denx,uimage";
- };
+ partition@2e0000 {
+ label = "OLDART";
+ reg = <0x2e0000 0x40000>;
+ read-only;
+ };
- /* hole 0xf80000 - 0xfaf100 */
+ partition@320000 {
+ label = "firmware";
+ reg = <0x320000 0xc60000>;
+ compatible = "denx,uimage";
+ };
- defaultmac: default-mac@0xfaf100 {
- label = "default-mac";
- reg = <0xfaf100 0x00200>;
- read-only;
- };
+ /* hole 0xf80000 - 0xfaf100 */
- ART@fc0000 {
- label = "ART";
- reg = <0xfc0000 0x40000>;
- read-only;
+ partition@faf100 {
+ label = "default-mac";
+ reg = <0xfaf100 0x00200>;
+ read-only;
- compatible = "nvmem-cells";
- #address-cells = <1>;
- #size-cells = <1>;
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
- precal_ART_1000: precal@1000 {
- reg = <0x1000 0x2f20>;
+ macaddr_defaultmac_0: macaddr@0 {
+ reg = <0x0 0x6>;
+ };
};
- precal_ART_5000: precal@5000 {
- reg = <0x5000 0x2f20>;
+ partition@fc0000 {
+ label = "ART";
+ reg = <0xfc0000 0x40000>;
+ read-only;
+
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ precal_ART_1000: precal@1000 {
+ reg = <0x1000 0x2f20>;
+ };
+
+ precal_ART_5000: precal@5000 {
+ reg = <0x5000 0x2f20>;
+ };
};
};
};
&adm_dma {
status = "okay";
};
-
-&defaultmac {
- compatible = "nvmem-cells";
- #address-cells = <1>;
- #size-cells = <1>;
-
- macaddr_defaultmac_0: macaddr@0 {
- reg = <0x0 0x6>;
- };
-};