media: marvell-ccic: don't generate EOF on parallel bus

The commit
05fed81625bf ("[media] marvell-ccic: add MIPI support for marvell-ccic driver")
that claimed to add CSI2 turned on C0_EOF_VSYNC for parallel bus
without a very good explanation.

That broke camera on OLPC XO-1.75 which precisely uses a sensor on a
parallel bus. Revert that chunk.

Tested on an OLPC XO-1.75.

Fixes: 05fed81625bf ("[media] marvell-ccic: add MIPI support for marvell-ccic driver")
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>

diff --git a/drivers/media/platform/marvell-ccic/mcam-core.c b/drivers/media/platform/marvell-ccic/mcam-core.c
index 0a6411b877e90652cc6d7792f6a0a0f4eee26740..040fe9501415d5dd73a35f91dfa6b4b8fd1f0da5 100644 (file)
--- a/drivers/media/platform/marvell-ccic/mcam-core.c
+++ b/drivers/media/platform/marvell-ccic/mcam-core.c
@@ -792,12 +792,6 @@ static void mcam_ctlr_image(struct mcam_camera *cam)
         * Make sure it knows we want to use hsync/vsync.
         */
        mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC, C0_SIFM_MASK);
-       /*
-        * This field controls the generation of EOF(DVP only)
-        */
-       if (cam->bus_type != V4L2_MBUS_CSI2_DPHY)
-               mcam_reg_set_bit(cam, REG_CTRL0,
-                               C0_EOF_VSYNC | C0_VEDGE_CTRL);
 }