net/fm: add 2.5G SGMII support
authorShengzhou Liu <Shengzhou.Liu@freescale.com>
Thu, 23 Oct 2014 09:20:57 +0000 (17:20 +0800)
committerYork Sun <yorksun@freescale.com>
Thu, 20 Nov 2014 02:17:12 +0000 (18:17 -0800)
As auto-negotiation is not supported for 2.5G SGMII, we need
to add a new type PHY_INTERFACE_MODE_SGMII_2500 to differentiate
SGMII-1G and SGMII-2.5G with different setting for auto-negotiation.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
arch/powerpc/include/asm/fsl_serdes.h
drivers/net/fm/eth.c
include/phy.h

index f60cb0a6de22522cd7265c4d95134a30aacbfbea..8e0e190003872928bc3814e028388a9b6e025029 100644 (file)
@@ -71,6 +71,22 @@ enum srds_prtcl {
        INTERLAKEN,
        QSGMII_SW1_A,           /* Indicates ports on L2 Switch */
        QSGMII_SW1_B,
+       SGMII_2500_FM1_DTSEC1,
+       SGMII_2500_FM1_DTSEC2,
+       SGMII_2500_FM1_DTSEC3,
+       SGMII_2500_FM1_DTSEC4,
+       SGMII_2500_FM1_DTSEC5,
+       SGMII_2500_FM1_DTSEC6,
+       SGMII_2500_FM1_DTSEC9,
+       SGMII_2500_FM1_DTSEC10,
+       SGMII_2500_FM2_DTSEC1,
+       SGMII_2500_FM2_DTSEC2,
+       SGMII_2500_FM2_DTSEC3,
+       SGMII_2500_FM2_DTSEC4,
+       SGMII_2500_FM2_DTSEC5,
+       SGMII_2500_FM2_DTSEC6,
+       SGMII_2500_FM2_DTSEC9,
+       SGMII_2500_FM2_DTSEC10,
 };
 
 enum srds {
index 218a5ed17509a6d2d50eb83cbebabd55fe110a53..137886c2f3cd5f0d2a74537d51ad1cba0562c103 100644 (file)
@@ -39,9 +39,14 @@ static void dtsec_configure_serdes(struct fm_eth *priv)
        u32 value;
        struct mii_dev bus;
        bus.priv = priv->mac->phyregs;
+       bool sgmii_2500 = (priv->enet_if ==
+                       PHY_INTERFACE_MODE_SGMII_2500) ? true : false;
+
+       /* SGMII IF mode + AN enable only for 1G SGMII, not for 2.5G */
+       value = PHY_SGMII_IF_MODE_SGMII;
+       if (!sgmii_2500)
+               value |= PHY_SGMII_IF_MODE_AN;
 
-       /* SGMII IF mode + AN enable */
-       value = PHY_SGMII_IF_MODE_AN | PHY_SGMII_IF_MODE_SGMII;
        memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0x14, value);
 
        /* Dev ability according to SGMII specification */
@@ -54,7 +59,9 @@ static void dtsec_configure_serdes(struct fm_eth *priv)
        memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0x12, 0xd40);
 
        /* Restart AN */
-       value = PHY_SGMII_CR_DEF_VAL | PHY_SGMII_CR_RESET_AN;
+       value = PHY_SGMII_CR_DEF_VAL;
+       if (!sgmii_2500)
+               value |= PHY_SGMII_CR_RESET_AN;
        memac_mdio_write(&bus, 0, MDIO_DEVAD_NONE, 0, value);
 #else
        struct dtsec *regs = priv->mac->base;
@@ -83,7 +90,8 @@ static void dtsec_init_phy(struct eth_device *dev)
        out_be32(&regs->tbipa, CONFIG_SYS_TBIPA_VALUE);
 #endif
 
-       if (fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII)
+       if (fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII ||
+           fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII_2500)
                dtsec_configure_serdes(fm_eth);
 }
 
index b4950776977e5440a75873065b753c472798a73e..d430ed0e32b2fc4476961e7db99b3476e31c2d38 100644 (file)
@@ -41,6 +41,7 @@ typedef enum {
        PHY_INTERFACE_MODE_MII,
        PHY_INTERFACE_MODE_GMII,
        PHY_INTERFACE_MODE_SGMII,
+       PHY_INTERFACE_MODE_SGMII_2500,
        PHY_INTERFACE_MODE_QSGMII,
        PHY_INTERFACE_MODE_TBI,
        PHY_INTERFACE_MODE_RMII,
@@ -57,6 +58,7 @@ static const char *phy_interface_strings[] = {
        [PHY_INTERFACE_MODE_MII]                = "mii",
        [PHY_INTERFACE_MODE_GMII]               = "gmii",
        [PHY_INTERFACE_MODE_SGMII]              = "sgmii",
+       [PHY_INTERFACE_MODE_SGMII_2500]         = "sgmii-2500",
        [PHY_INTERFACE_MODE_QSGMII]             = "qsgmii",
        [PHY_INTERFACE_MODE_TBI]                = "tbi",
        [PHY_INTERFACE_MODE_RMII]               = "rmii",