drm/i915: Break i915_spin_request() if we see an interrupt

If an interrupt has been posted, and we were spinning on the active
seqno waiting for it to advance but it did not, then we can expect that
it will not see its advance in the immediate future and should call into
the irq-seqno barrier. We can stop spinning at this point, and leave the
difficulty of handling the coherency to the caller.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170217151304.16665-3-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c
index 2f6cfa47dc618ce6eba89600b164d4cf99bfc490..a5fac40d2a4f00534afc60dab26d9f20e57b3d88 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/i915_gem_request.c
@@ -963,7 +963,8 @@ static bool busywait_stop(unsigned long timeout, unsigned int cpu)
 bool __i915_spin_request(const struct drm_i915_gem_request *req,
                         int state, unsigned long timeout_us)
 {
-       unsigned int cpu;
+       struct intel_engine_cs *engine = req->engine;
+       unsigned int irq, cpu;
 
        /* When waiting for high frequency requests, e.g. during synchronous
         * rendering split between the CPU and GPU, the finite amount of time
@@ -975,11 +976,20 @@ bool __i915_spin_request(const struct drm_i915_gem_request *req,
         * takes to sleep on a request, on the order of a microsecond.
         */
 
+       irq = atomic_read(&engine->irq_count);
        timeout_us += local_clock_us(&cpu);
        do {
                if (__i915_gem_request_completed(req))
                        return true;
 
+               /* Seqno are meant to be ordered *before* the interrupt. If
+                * we see an interrupt without a corresponding seqno advance,
+                * assume we won't see one in the near future but require
+                * the engine->seqno_barrier() to fixup coherency.
+                */
+               if (atomic_read(&engine->irq_count) != irq)
+                       break;
+
                if (signal_pending_state(state, current))
                        break;