BOARD="$(BOARDNAME)" PLATFORM="$(LOADER_PLATFORM)" \
LZMA_TEXT_START=$(LZMA_TEXT_START) \
LOADADDR=$(LOADADDR) \
+ SUBTARGET=$(SUBTARGET) \
$(1) compile loader.$(LOADER_TYPE)
mv "$@.$(LOADER_TYPE)" "$@"
rm -rf $@.src
FLASH_MAX :=
BOARD :=
PLATFORM :=
+SUBTARGET :=
+CACHE_FLAGS := -DCONFIG_CACHELINE_SIZE=32
ifeq ($(TARGET_DIR),)
TARGET_DIR := $(KDIR)
FLASH_MAX=$(FLASH_MAX) \
BOARD="$(BOARD)" \
PLATFORM="$(PLATFORM)" \
+ SUBTARGET="$(SUBTARGET)" \
+ CACHE_FLAGS="$(CACHE_FLAGS)" \
clean all
loader.gz: $(PKG_BUILD_DIR)/loader.bin
FLASH_OFFS :=
FLASH_MAX :=
PLATFORM :=
+SUBTARGET :=
CACHE_FLAGS :=
CC := $(CROSS_COMPILE)gcc
OBJDUMP := $(CROSS_COMPILE)objdump
-include $(PLATFORM).mk
-
BIN_FLAGS := -O binary -R .reginfo -R .note -R .comment -R .mdebug \
-R .MIPS.abiflags -S
O_FORMAT = $(shell $(OBJDUMP) -i | head -2 | grep elf32)
-OBJECTS := head.o loader.o cache.o board-$(PLATFORM).o printf.o LzmaDecode.o
+OBJECTS := head.o loader.o cache.o board.o printf.o LzmaDecode.o
+
+ifeq ($(strip $(SUBTARGET)),)
+$(error "Please specify a SUBTARGET!")
+endif
+
+ifeq ($(strip $(SUBTARGET)),mt7620)
+CFLAGS += -DSOC_MT7620
+endif
+
+ifeq ($(strip $(SUBTARGET)),mt7621)
+CFLAGS += -DSOC_MT7621
+endif
+
+ifeq ($(strip $(SUBTARGET)),rt305x)
+CFLAGS += -DSOC_RT305X
+endif
+
+ifeq ($(strip $(SUBTARGET)),rt3883)
+CFLAGS += -DSOC_RT3883
+endif
ifneq ($(strip $(LOADER_DATA)),)
OBJECTS += data.o
+++ /dev/null
-/*
- * Arch specific code for mt7621 based boards, based on code for Ralink boards
- *
- * Copyright (C) 2018 Tobias Schramm <tobleminer@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include <stddef.h>
-#include <stdint.h>
-#include "config.h"
-
-#define READREG(r) *(volatile uint32_t *)(r)
-#define WRITEREG(r,v) *(volatile uint32_t *)(r) = v
-
-#define KSEG1ADDR(_x) (((_x) & 0x1fffffff) | 0xa0000000)
-
-#define UART_BASE 0xBE000C00
-
-#define UART_TBR_OFFSET 0x00
-#define UART_LSR_OFFSET 0x14
-
-#define UART_LSR_TEMT (1 << 6)
-
-#define UART_READ(r) READREG(UART_BASE + (r))
-#define UART_WRITE(r,v) WRITEREG(UART_BASE + (r), (v))
-
-void board_putc(int ch)
-{
- while (((UART_READ(UART_LSR_OFFSET)) & UART_LSR_TEMT) == 0);
- UART_WRITE(UART_TBR_OFFSET, ch);
- while (((UART_READ(UART_LSR_OFFSET)) & UART_LSR_TEMT) == 0);
-}
-
-void board_init(void)
-{
-}
+++ /dev/null
-/*
- * Arch specific code for Ralink based boards
- *
- * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include <stddef.h>
-#include "config.h"
-
-#define READREG(r) *(volatile unsigned int *)(r)
-#define WRITEREG(r,v) *(volatile unsigned int *)(r) = v
-
-#define KSEG1ADDR(_x) (((_x) & 0x1fffffff) | 0xa0000000)
-
-#ifdef CONFIG_SOC_RT288X
-#define UART_BASE 0xb0300c00
-#else
-#define UART_BASE 0xb0000c00
-#endif
-
-#define UART_TX 1
-#define UART_LSR 7
-
-#define UART_LSR_THRE 0x20
-
-#define UART_READ(r) READREG(UART_BASE + 4 * (r))
-#define UART_WRITE(r,v) WRITEREG(UART_BASE + 4 * (r), (v))
-
-void board_putc(int ch)
-{
- while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
- UART_WRITE(UART_TX, ch);
- while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
-}
-
-void board_init(void)
-{
-}
--- /dev/null
+/*
+ * Arch specific code for ramips based boards
+ *
+ * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
+ * Copyright (C) 2018 Tobias Schramm <tobleminer@gmail.com>
+ * Copyright (C) 2023 Antonio Vázquez <antoniovazquezblanco@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <stdint.h>
+
+#if defined(SOC_MT7620) || defined(SOC_RT3883)
+#define UART_BASE 0xb0000c00
+#define UART_THR (UART_BASE + 0x04)
+#define UART_LSR (UART_BASE + 0x1c)
+#define UART_LSR_THRE_MASK 0x40
+#elif defined(SOC_MT7621)
+#define UART_BASE 0xbe000c00
+#define UART_THR (UART_BASE + 0x00)
+#define UART_LSR (UART_BASE + 0x14)
+#define UART_LSR_THRE_MASK 0x20
+#elif defined(SOC_RT305X)
+#define UART_BASE 0x10000500
+#define UART_THR (UART_BASE + 0x04)
+#define UART_LSR (UART_BASE + 0x1c)
+#define UART_LSR_THRE_MASK 0x20
+#else
+#error "Unsupported SOC..."
+#endif
+
+// Helper functions
+#define READREG(r) (*(volatile uint32_t *)(r))
+#define WRITEREG(r,v) (*(volatile uint32_t *)(r)) = v
+
+
+void board_init(void)
+{
+}
+
+void board_putc(int ch)
+{
+ while ((READREG(UART_LSR) & UART_LSR_THRE_MASK) == 0);
+ WRITEREG(UART_THR, ch);
+ while ((READREG(UART_LSR) & UART_LSR_THRE_MASK) == 0);
+}
+++ /dev/null
-CACHE_FLAGS+=-DCONFIG_ICACHE_SIZE="(32 * 1024)" -DCONFIG_DCACHE_SIZE="(32 * 1024)" -DCONFIG_CACHELINE_SIZE=32
+++ /dev/null
-CACHE_FLAGS+=-DCONFIG_ICACHE_SIZE="(32 * 1024)" -DCONFIG_DCACHE_SIZE="(16 * 1024)" -DCONFIG_CACHELINE_SIZE=32
+++ /dev/null
-CACHE_FLAGS+=-DCONFIG_ICACHE_SIZE="(32 * 1024)" -DCONFIG_DCACHE_SIZE="(16 * 1024)" -DCONFIG_CACHELINE_SIZE=32