brcm47xx: backport 3.14 patch for nvram GPIO pin read

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 40346

diff --git a/target/linux/brcm47xx/patches-3.10/143-MIPS-BCM47XX-Check-all-32-GPIOs-when-looking-for-a-p.patch b/target/linux/brcm47xx/patches-3.10/143-MIPS-BCM47XX-Check-all-32-GPIOs-when-looking-for-a-p.patch
new file mode 100644 (file)
index 0000000..42ce9fe
--- /dev/null
+++ b/target/linux/brcm47xx/patches-3.10/143-MIPS-BCM47XX-Check-all-32-GPIOs-when-looking-for-a-p.patch
@@ -0,0 +1,30 @@
+From 4fe2169acecb6e62821dfe14bc5c5852870b516f Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
+Date: Thu, 13 Feb 2014 17:48:12 +0100
+Subject: MIPS: BCM47XX: Check all (32) GPIOs when looking for a pin
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Broadcom boards support 32 GPIOs and NVRAM may have entires for higher
+ones too. Example:
+gpio23=wombo_reset
+
+Signed-off-by: Rafa? Mi?ecki <zajec5@gmail.com>
+Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
+Cc: linux-mips@linux-mips.org
+Cc: Rafał Miłecki <zajec5@gmail.com>
+Patchwork: https://patchwork.linux-mips.org/patch/6547/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+
+--- a/arch/mips/bcm47xx/nvram.c
++++ b/arch/mips/bcm47xx/nvram.c
+@@ -197,7 +197,7 @@ int bcm47xx_nvram_gpio_pin(const char *n
+       char nvram_var[10];
+       char buf[30];
+ 
+-      for (i = 0; i < 16; i++) {
++      for (i = 0; i < 32; i++) {
+               err = snprintf(nvram_var, sizeof(nvram_var), "gpio%i", i);
+               if (err <= 0)
+                       continue;