Tegra210: skip the BTB invalidate workaround for B01 SKUs

This patch skips the BTB invalidate workaround for Tegra210-B01 chips, as
they have already been fixed in the hardware. To allow the .S file to
include macros, add proper guards to tegra_platform.h.

Change-Id: I0826d3c54faeffc9cb0709331f47cbdf25d4b653
Signed-off-by: Harvey Hsieh <hhsieh@nvidia.com>

diff --git a/plat/nvidia/tegra/common/aarch64/tegra_helpers.S b/plat/nvidia/tegra/common/aarch64/tegra_helpers.S
index fca2f7e3683dd2c844e257461a920de7d819fb30..2bf9a225d9fed4a4af48eb99256cb3d6346b5978 100644 (file)
--- a/plat/nvidia/tegra/common/aarch64/tegra_helpers.S
+++ b/plat/nvidia/tegra/common/aarch64/tegra_helpers.S
@@ -11,6 +11,7 @@
 #include <cortex_a57.h>
 #include <platform_def.h>
 #include <tegra_def.h>
+#include <tegra_platform.h>
 
 #define MIDR_PN_CORTEX_A57             0xD07
 
@@ -311,6 +312,23 @@ func tegra_secure_entrypoint _align=6
 
 #if ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT
 
+       /* --------------------------------------------------------
+        * Skip the invalidate BTB workaround for Tegra210B01 SKUs.
+        * --------------------------------------------------------
+        */
+       mov     x0, #TEGRA_MISC_BASE
+       add     x0, x0, #HARDWARE_REVISION_OFFSET
+       ldr     w1, [x0]
+       lsr     w1, w1, #CHIP_ID_SHIFT
+       and     w1, w1, #CHIP_ID_MASK
+       cmp     w1, #TEGRA_CHIPID_TEGRA21       /* T210? */
+       b.ne    2f
+       ldr     w1, [x0]
+       lsr     w1, w1, #MAJOR_VERSION_SHIFT
+       and     w1, w1, #MAJOR_VERSION_MASK
+       cmp     w1, #0x02                       /* T210 B01? */
+       b.eq    2f
+
        /* -------------------------------------------------------
         * Invalidate BTB along with I$ to remove any stale
         * entries from the branch predictor array.
@@ -367,7 +385,7 @@ func tegra_secure_entrypoint _align=6
        .rept   65
        nop
        .endr
-
+2:
        /* --------------------------------------------------
         * Do not insert instructions here
         * --------------------------------------------------

diff --git a/plat/nvidia/tegra/common/tegra_platform.c b/plat/nvidia/tegra/common/tegra_platform.c
index adf252b53b07434fa4a05b7fced69796b2c14625..72da12663ed2b7c849c38a42aed4fde3ddd42984 100644 (file)
--- a/plat/nvidia/tegra/common/tegra_platform.c
+++ b/plat/nvidia/tegra/common/tegra_platform.c
@@ -47,15 +47,6 @@ typedef enum tegra_platform {
 #define TEGRA_PRE_SI_DSIM_ASIM_LINSIM  U(6)
 #define TEGRA_PRE_SI_VDK               U(8)
 
-/*******************************************************************************
- * Tegra chip ID values
- ******************************************************************************/
-typedef enum tegra_chipid {
-       TEGRA_CHIPID_TEGRA13 = 0x13,
-       TEGRA_CHIPID_TEGRA21 = 0x21,
-       TEGRA_CHIPID_TEGRA18 = 0x18,
-} tegra_chipid_t;
-
 /*
  * Read the chip ID value
  */

diff --git a/plat/nvidia/tegra/include/tegra_platform.h b/plat/nvidia/tegra/include/tegra_platform.h
index 33223aadfec758702dc473672d395732ef175c5f..1e7ba165c619f32fe5d5d26771f3380b37ddddc8 100644 (file)
--- a/plat/nvidia/tegra/include/tegra_platform.h
+++ b/plat/nvidia/tegra/include/tegra_platform.h
@@ -23,8 +23,17 @@
 #define PRE_SI_PLATFORM_SHIFT          U(0x14)
 #define PRE_SI_PLATFORM_MASK           U(0xF)
 
-/*
+/*******************************************************************************
  * Tegra chip ID values
+ ******************************************************************************/
+#define TEGRA_CHIPID_TEGRA13           U(0x13)
+#define TEGRA_CHIPID_TEGRA21           U(0x21)
+#define TEGRA_CHIPID_TEGRA18           U(0x18)
+
+#ifndef __ASSEMBLY__
+
+/*
+ * Tegra chip ID major/minor identifiers
  */
 uint32_t tegra_get_chipid_major(void);
 uint32_t tegra_get_chipid_minor(void);
@@ -49,4 +58,6 @@ bool tegra_platform_is_fpga(void);
 bool tegra_platform_is_unit_fpga(void);
 bool tegra_platform_is_virt_dev_kit(void);
 
+#endif /* __ASSEMBLY__ */
+
 #endif /* TEGRA_PLATFORM_H */