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ath79: fix RGMII delay for ar9344 Senao APs
author
Michael Pratt
<mcpratt@pm.me>
Sat, 12 Jun 2021 19:37:38 +0000
(15:37 -0400)
committer
Hauke Mehrtens
<hauke@hauke-m.de>
Sun, 11 Sep 2022 19:54:00 +0000
(21:54 +0200)
after some trial and error, it was discovered
that by setting TX only delay on the AR8035 PHY
that setting GMAC registers is no longer necessary.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
target/linux/ath79/dts/ar9344_senao_ap-dual.dtsi
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diff --git
a/target/linux/ath79/dts/ar9344_senao_ap-dual.dtsi
b/target/linux/ath79/dts/ar9344_senao_ap-dual.dtsi
index 09dc5806d7a5116fc351d36a082861e481695524..c963138f6a118cbc7a85a020d245ccd1c325fa9d 100644
(file)
--- a/
target/linux/ath79/dts/ar9344_senao_ap-dual.dtsi
+++ b/
target/linux/ath79/dts/ar9344_senao_ap-dual.dtsi
@@
-51,16
+51,9
@@
status = "okay";
phy-handle = <&phy0>;
- phy-mode = "rgmii-id";
+ phy-mode = "rgmii-
tx
id";
pll-data = <0x02000000 0x00000101 0x00001313>;
-
- gmac-config {
- device = <&gmac>;
- rgmii-gmac0 = <1>;
- rxdv-delay = <3>;
- rxd-delay = <3>;
- };
};
&pcie {