drm/i915: Remove the "INDEX" suffix from PPAT marcos
authorZhi Wang <zhi.a.wang@intel.com>
Thu, 14 Sep 2017 12:39:41 +0000 (20:39 +0800)
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Thu, 14 Sep 2017 13:46:36 +0000 (16:46 +0300)
Remove the "INDEX" suffix from PPAT marcos as they are bits actually, not
indexes.

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Cc: Ben Widawsky <benjamin.widawsky@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1505392783-4084-2-git-send-email-zhi.a.wang@intel.com
drivers/gpu/drm/i915/gvt/gtt.c
drivers/gpu/drm/i915/i915_gem_gtt.c
drivers/gpu/drm/i915/i915_gem_gtt.h

index 0bd028f8fef532b27e4093a9f1712a92bbab965c..2801d70579d8cd3839ae904386127d4007efd3de 100644 (file)
@@ -1971,7 +1971,7 @@ static int alloc_scratch_pages(struct intel_vgpu *vgpu,
                 */
                se.val64 |= _PAGE_PRESENT | _PAGE_RW;
                if (type == GTT_TYPE_PPGTT_PDE_PT)
-                       se.val64 |= PPAT_CACHED_INDEX;
+                       se.val64 |= PPAT_CACHED;
 
                for (i = 0; i < page_entry_num; i++)
                        ops->set_entry(scratch_pt, &se, i, false, 0, vgpu);
index c7ee7d8f1b43f7c621b77acfe81bae2f9759e759..729ebaf29b7199e545bd54d7842b022c1d13e42a 100644 (file)
@@ -230,13 +230,13 @@ static gen8_pte_t gen8_pte_encode(dma_addr_t addr,
 
        switch (level) {
        case I915_CACHE_NONE:
-               pte |= PPAT_UNCACHED_INDEX;
+               pte |= PPAT_UNCACHED;
                break;
        case I915_CACHE_WT:
-               pte |= PPAT_DISPLAY_ELLC_INDEX;
+               pte |= PPAT_DISPLAY_ELLC;
                break;
        default:
-               pte |= PPAT_CACHED_INDEX;
+               pte |= PPAT_CACHED;
                break;
        }
 
@@ -249,9 +249,9 @@ static gen8_pde_t gen8_pde_encode(const dma_addr_t addr,
        gen8_pde_t pde = _PAGE_PRESENT | _PAGE_RW;
        pde |= addr;
        if (level != I915_CACHE_NONE)
-               pde |= PPAT_CACHED_PDE_INDEX;
+               pde |= PPAT_CACHED_PDE;
        else
-               pde |= PPAT_UNCACHED_INDEX;
+               pde |= PPAT_UNCACHED;
        return pde;
 }
 
index f3943b6ab30cc70c83dca8c5e41a38fc50b2c791..f62fb903dc24a6abbd7d6abec55900a81e243c89 100644 (file)
@@ -126,10 +126,10 @@ typedef u64 gen8_ppgtt_pml4e_t;
  * tables */
 #define GEN8_PDPE_MASK                 0x1ff
 
-#define PPAT_UNCACHED_INDEX            (_PAGE_PWT | _PAGE_PCD)
-#define PPAT_CACHED_PDE_INDEX          0 /* WB LLC */
-#define PPAT_CACHED_INDEX              _PAGE_PAT /* WB LLCeLLC */
-#define PPAT_DISPLAY_ELLC_INDEX                _PAGE_PCD /* WT eLLC */
+#define PPAT_UNCACHED                  (_PAGE_PWT | _PAGE_PCD)
+#define PPAT_CACHED_PDE                        0 /* WB LLC */
+#define PPAT_CACHED                    _PAGE_PAT /* WB LLCeLLC */
+#define PPAT_DISPLAY_ELLC              _PAGE_PCD /* WT eLLC */
 
 #define CHV_PPAT_SNOOP                 (1<<6)
 #define GEN8_PPAT_AGE(x)               ((x)<<4)