dt-bindings: iio: adc: stm32-dfsdm: fix types, add missing pinctrl
authorFabrice Gasnier <fabrice.gasnier@st.com>
Fri, 23 Feb 2018 11:11:00 +0000 (12:11 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Sat, 3 Mar 2018 15:07:14 +0000 (15:07 +0000)
- Add missing pinctrl description. Support is made optional as dfsdm
  may use internal sources (e.g. via registers)
- Fix typo in IIO STM32 DFSDM filter "MANCH_F" description.
Basically, this should be "falling edge = logic 0", not "1" that applies
to "MANCH_R".
BTW, make the description complete by describing both rising/falling
edges as described in reference manuals.

Fixes: 6c82f947fc97 ("IIO: add DT bindings for stm32 DFSDM filter")
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.txt

index 911492da48f3e90453c108db257becbe9e1fd896..ed7520d1d0518d96be3d543cb5da59f7dd40a736 100644 (file)
@@ -32,6 +32,10 @@ Optional properties:
                  to "clock" property. Frequency must be a multiple of the rcc
                  clock frequency. If not, SPI CLKOUT frequency will not be
                  accurate.
+- pinctrl-names:       Set to "default".
+- pinctrl-0:           List of phandles pointing to pin configuration
+                       nodes to set pins in mode of operation for dfsdm
+                       on external pin.
 
 Contents of a STM32 DFSDM child nodes:
 --------------------------------------
@@ -68,8 +72,8 @@ Optional properties:
 - st,adc-channel-types:        Single-ended channel input type.
                        - "SPI_R": SPI with data on rising edge (default)
                        - "SPI_F": SPI with data on falling edge
-                       - "MANCH_R": manchester codec, rising edge = logic 0
-                       - "MANCH_F": manchester codec, falling edge = logic 1
+                       - "MANCH_R": manchester codec, rising edge = logic 0, falling edge = logic 1
+                       - "MANCH_F": manchester codec, rising edge = logic 1, falling edge = logic 0
 - st,adc-channel-clk-src: Conversion clock source.
                          - "CLKIN": external SPI clock (CLKIN x)
                          - "CLKOUT": internal SPI clock (CLKOUT) (default)