This fixes up the SMP support to use the refactored GIC APIs.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* ARM Interrupt demux handler using GIC
*
* Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2010 Renesas Solutions Corp.
+ * Copyright (C) 2011 Paul Mundt
+ * Copyright (C) 2010 - 2011 Renesas Solutions Corp.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
+#include <asm/assembler.h>
#include <asm/entry-macro-multi.S>
#include <asm/hardware/gic.h>
#include <asm/hardware/entry-macro-gic.S>
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =(0xf0000100)
- .endm
-
arch_irq_handler shmobile_handle_irq_gic
#define __MACH_SMP_H
#include <asm/hardware/gic.h>
-#include <asm/smp_mpidr.h>
/*
* We use IRQ1 as the IPI
*/
-static inline void smp_cross_call(const struct cpumask *mask)
+static inline void smp_cross_call(const struct cpumask *mask, int ipi)
{
#if defined(CONFIG_ARM_GIC)
- gic_raise_softirq(mask, 1);
+ gic_raise_softirq(mask, ipi);
#endif
}
+
#endif
void __init sh73a0_init_irq(void)
{
+ void __iomem *gic_base = __io(0xf0001000);
void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
- gic_dist_init(0, __io(0xf0001000), 29);
- gic_cpu_init(0, __io(0xf0000100));
+ gic_init(0, 29, gic_base, gic_base);
register_intc_controller(&intcs_desc);
void __cpuinit sh73a0_secondary_init(unsigned int cpu)
{
- gic_cpu_init(0, __io(0xf0000100));
+ gic_secondary_init(0);
}
int __cpuinit sh73a0_boot_secondary(unsigned int cpu)