pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tue, 9 Jun 2015 16:47:13 +0000 (18:47 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Wed, 10 Jun 2015 11:57:28 +0000 (13:57 +0200)
For consistency with the datasheet, this commit renames the VDD
function of the MPP4 pin.

While this changes the DT compatibility, it is not considered to be a
problem since this pin is unlikely to be used for anything but
debugging purposes.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt
drivers/pinctrl/mvebu/pinctrl-armada-370.c

index 44aedd5351c517ed35d62052a7b4d5a50bf21271..3a7dc0e6c94ca089b4987772ed9039c6292d55e6 100644 (file)
@@ -17,7 +17,7 @@ mpp0          0        gpio, uart0(rxd)
 mpp1          1        gpo, uart0(txd)
 mpp2          2        gpio, i2c0(sck), uart0(txd)
 mpp3          3        gpio, i2c0(sda), uart0(rxd)
-mpp4          4        gpio, cpu_pd(vdd)
+mpp4          4        gpio, vdd(cpu-pd)
 mpp5          5        gpo, ge0(txclkout), uart1(txd), spi1(clk), audio(mclk)
 mpp6          6        gpio, ge0(txd0), sata0(prsnt), tdm(rst), audio(sdo)
 mpp7          7        gpo, ge0(txd1), tdm(dtx), audio(lrclk)
index cabf188a1d17b2222255e5f2d0a0ff8f8c89c8e3..fc16ef6e2435dffe01915a9033e9549eac297a22 100644 (file)
@@ -52,7 +52,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
           MPP_FUNCTION(0x2, "uart0", "rxd")),
        MPP_MODE(4,
           MPP_FUNCTION(0x0, "gpio", NULL),
-          MPP_FUNCTION(0x1, "cpu_pd", "vdd")),
+          MPP_FUNCTION(0x1, "vdd", "cpu-pd")),
        MPP_MODE(5,
           MPP_FUNCTION(0x0, "gpo", NULL),
           MPP_FUNCTION(0x1, "ge0", "txclkout"),