Use dev_dbg macro to control tracing verbosity through dynamic debug facility.
Signed-off-by: Fabio Falzoi <fabio.falzoi84@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+++ /dev/null
-/* Driver for Realtek PCI-Express card reader
- * Header file
- *
- * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2, or (at your option) any
- * later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, see <http://www.gnu.org/licenses/>.
- *
- * Author:
- * Wei WANG (wei_wang@realsil.com.cn)
- * Micky Ching (micky_ching@realsil.com.cn)
- */
-
-#ifndef __REALTEK_RTSX_DEBUG_H
-#define __REALTEK_RTSX_DEBUG_H
-
-#include <linux/kernel.h>
-
-#define RTSX_STOR "rts5208: "
-
-#ifdef CONFIG_RTS5208_DEBUG
-#define RTSX_DEBUGP(x...) pr_debug(RTSX_STOR x)
-#define RTSX_DEBUGPN(x...) pr_debug(x)
-#define RTSX_DEBUGPX(x...) printk(x)
-#define RTSX_DEBUG(x) x
-#else
-#define RTSX_DEBUGP(x...)
-#define RTSX_DEBUGPN(x...)
-#define RTSX_DEBUGPX(x...)
-#define RTSX_DEBUG(x)
-#endif
-
-#endif /* __REALTEK_RTSX_DEBUG_H */
int retval;
u8 *ptr;
- RTSX_DEBUGP("ms_transfer_tpc: tpc = 0x%x\n", tpc);
+ dev_dbg(rtsx_dev(chip), "%s: tpc = 0x%x\n", __func__, tpc);
rtsx_init_cmd(chip);
u8 val = 0;
rtsx_read_register(chip, MS_TRANS_CFG, &val);
- RTSX_DEBUGP("MS_TRANS_CFG: 0x%02x\n", val);
+ dev_dbg(rtsx_dev(chip), "MS_TRANS_CFG: 0x%02x\n", val);
rtsx_clear_ms_error(chip);
data[i] = ptr[i];
if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) {
- RTSX_DEBUGP("Read format progress:\n");
+ dev_dbg(rtsx_dev(chip), "Read format progress:\n");
RTSX_DUMP(ptr, cnt);
}
oc_mask = SD_OC_NOW | SD_OC_EVER;
if (chip->ocp_stat & oc_mask) {
- RTSX_DEBUGP("Over current, OCPSTAT is 0x%x\n",
- chip->ocp_stat);
+ dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
+ chip->ocp_stat);
TRACE_RET(chip, STATUS_FAIL);
}
#endif
TRACE_RET(chip, STATUS_FAIL);
RTSX_READ_REG(chip, PPBUF_BASE2 + 2, &val);
- RTSX_DEBUGP("Type register: 0x%x\n", val);
+ dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val);
if (val != 0x01) {
if (val != 0x02)
ms_card->check_ms_flow = 1;
}
RTSX_READ_REG(chip, PPBUF_BASE2 + 4, &val);
- RTSX_DEBUGP("Category register: 0x%x\n", val);
+ dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val);
if (val != 0) {
ms_card->check_ms_flow = 1;
TRACE_RET(chip, STATUS_FAIL);
}
RTSX_READ_REG(chip, PPBUF_BASE2 + 5, &val);
- RTSX_DEBUGP("Class register: 0x%x\n", val);
+ dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val);
if (val == 0) {
RTSX_READ_REG(chip, PPBUF_BASE2, &val);
if (val & WRT_PRTCT)
ms_card->ms_type |= TYPE_MSPRO;
RTSX_READ_REG(chip, PPBUF_BASE2 + 3, &val);
- RTSX_DEBUGP("IF Mode register: 0x%x\n", val);
+ dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val);
if (val == 0) {
ms_card->ms_type &= 0x0F;
} else if (val == 7) {
((u32)buf[cur_addr_off + 5] << 16) |
((u32)buf[cur_addr_off + 6] << 8) |
buf[cur_addr_off + 7];
- RTSX_DEBUGP("sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
sys_info_addr, sys_info_size);
if (sys_info_size != 96) {
kfree(buf);
((u32)buf[cur_addr_off + 5] << 16) |
((u32)buf[cur_addr_off + 6] << 8) |
buf[cur_addr_off + 7];
- RTSX_DEBUGP("model_name_addr = 0x%x, model_name_size = 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "model_name_addr = 0x%x, model_name_size = 0x%x\n",
model_name_addr, model_name_size);
if (model_name_size != 48) {
kfree(buf);
((u32)buf[sys_info_addr + 33] << 16) |
((u32)buf[sys_info_addr + 34] << 8) |
buf[sys_info_addr + 35];
- RTSX_DEBUGP("xc_total_blk = 0x%x, xc_blk_size = 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "xc_total_blk = 0x%x, xc_blk_size = 0x%x\n",
xc_total_blk, xc_blk_size);
} else {
total_blk = ((u16)buf[sys_info_addr + 6] << 8) |
buf[sys_info_addr + 7];
blk_size = ((u16)buf[sys_info_addr + 2] << 8) |
buf[sys_info_addr + 3];
- RTSX_DEBUGP("total_blk = 0x%x, blk_size = 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
total_blk, blk_size);
}
#else
total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
- RTSX_DEBUGP("total_blk = 0x%x, blk_size = 0x%x\n", total_blk, blk_size);
+ dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
+ total_blk, blk_size);
#endif
- RTSX_DEBUGP("class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
- class_code, device_type, sub_class);
+ dev_dbg(rtsx_dev(chip), "class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
+ class_code, device_type, sub_class);
memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
#ifdef SUPPORT_PCGL_1P18
if (sub_class & 0xC0)
TRACE_RET(chip, STATUS_FAIL);
- RTSX_DEBUGP("class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
class_code, device_type, sub_class);
#ifdef SUPPORT_MSXC
if (change_power_class && CHK_MSXC(ms_card)) {
u8 power_class_en = chip->ms_power_class_en;
- RTSX_DEBUGP("power_class_en = 0x%x\n", power_class_en);
- RTSX_DEBUGP("change_power_class = %d\n", change_power_class);
+ dev_dbg(rtsx_dev(chip), "power_class_en = 0x%x\n",
+ power_class_en);
+ dev_dbg(rtsx_dev(chip), "change_power_class = %d\n",
+ change_power_class);
if (change_power_class)
power_class_en &= (1 << (change_power_class - 1));
if (power_class_en) {
u8 power_class_mode =
(ms_card->raw_sys_info[46] & 0x18) >> 3;
- RTSX_DEBUGP("power_class_mode = 0x%x",
+ dev_dbg(rtsx_dev(chip), "power_class_mode = 0x%x",
power_class_mode);
if (change_power_class > power_class_mode)
change_power_class = power_class_mode;
int retval, rty_cnt, uncorrect_flag = 0;
u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
- RTSX_DEBUGP("Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
old_blk, new_blk, log_blk);
- RTSX_DEBUGP("start_page = %d, end_page = %d\n", start_page, end_page);
+ dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d\n",
+ start_page, end_page);
retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
if (retval != STATUS_SUCCESS)
retval = ms_read_status_reg(chip);
if (retval != STATUS_SUCCESS) {
uncorrect_flag = 1;
- RTSX_DEBUGP("Uncorrectable error\n");
+ dev_dbg(rtsx_dev(chip), "Uncorrectable error\n");
} else {
uncorrect_flag = 0;
}
ms_write_extra_data(chip, old_blk, i,
extra, MS_EXTRA_SIZE);
- RTSX_DEBUGP("page %d : extra[0] = 0x%x\n", i, extra[0]);
+ dev_dbg(rtsx_dev(chip), "page %d : extra[0] = 0x%x\n",
+ i, extra[0]);
MS_SET_BAD_BLOCK_FLG(ms_card);
ms_set_page_status(log_blk, setPS_Error,
}
if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
- RTSX_DEBUGP("No boot block found!");
+ dev_dbg(rtsx_dev(chip), "No boot block found!");
TRACE_RET(chip, STATUS_FAIL);
}
ptr = rtsx_get_cmd_data(chip);
- RTSX_DEBUGP("Boot block data:\n");
+ dev_dbg(rtsx_dev(chip), "Boot block data:\n");
RTSX_DUMP(ptr, 16);
/* Block ID error
u8 val1, val2;
ms_card->segment_cnt = ms_card->total_block >> 9;
- RTSX_DEBUGP("ms_card->segment_cnt = %d\n", ms_card->segment_cnt);
+ dev_dbg(rtsx_dev(chip), "ms_card->segment_cnt = %d\n",
+ ms_card->segment_cnt);
size = ms_card->segment_cnt * sizeof(struct zone_entry);
ms_card->segment = vzalloc(size);
ms_card->segment[i].set_index = 0;
ms_card->segment[i].unused_blk_cnt = 0;
- RTSX_DEBUGP("defective block count of segment %d is %d\n",
- i, ms_card->segment[i].disable_count);
+ dev_dbg(rtsx_dev(chip), "defective block count of segment %d is %d\n",
+ i, ms_card->segment[i].disable_count);
}
return STATUS_SUCCESS;
u16 start, end, phy_blk, log_blk, tmp_blk;
u8 extra[MS_EXTRA_SIZE], us1, us2;
- RTSX_DEBUGP("ms_build_l2p_tbl: %d\n", seg_no);
+ dev_dbg(rtsx_dev(chip), "ms_build_l2p_tbl: %d\n", seg_no);
if (ms_card->segment == NULL) {
retval = ms_init_l2p_tbl(chip);
}
if (ms_card->segment[seg_no].build_flag) {
- RTSX_DEBUGP("l2p table of segment %d has been built\n", seg_no);
+ dev_dbg(rtsx_dev(chip), "l2p table of segment %d has been built\n",
+ seg_no);
return STATUS_SUCCESS;
}
retval = ms_read_extra_data(chip, phy_blk, 0,
extra, MS_EXTRA_SIZE);
if (retval != STATUS_SUCCESS) {
- RTSX_DEBUGP("read extra data fail\n");
+ dev_dbg(rtsx_dev(chip), "read extra data fail\n");
ms_set_bad_block(chip, phy_blk);
continue;
}
segment->build_flag = 1;
- RTSX_DEBUGP("unused block count: %d\n", segment->unused_blk_cnt);
+ dev_dbg(rtsx_dev(chip), "unused block count: %d\n",
+ segment->unused_blk_cnt);
/* Logical Address Confirmation Process */
if (seg_no == ms_card->segment_cnt - 1) {
for (log_blk = 0; log_blk < 494; log_blk++) {
tmp_blk = segment->l2p_table[log_blk];
if (tmp_blk < ms_card->boot_block) {
- RTSX_DEBUGP("Boot block is not the first normal block.\n");
+ dev_dbg(rtsx_dev(chip), "Boot block is not the first normal block.\n");
if (chip->card_wp & MS_CARD)
break;
TRACE_RET(chip, STATUS_FAIL);
}
- RTSX_DEBUGP("ms_card->ms_type = 0x%x\n", ms_card->ms_type);
+ dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type);
return STATUS_SUCCESS;
}
if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
chip->rw_need_retry = 0;
- RTSX_DEBUGP("No card exist, exit mspro_rw_multi_sector\n");
+ dev_dbg(rtsx_dev(chip), "No card exist, exit mspro_rw_multi_sector\n");
TRACE_RET(chip, STATUS_FAIL);
}
ms_send_cmd(chip, PRO_STOP, WAIT_INT);
if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
- RTSX_DEBUGP("MSPro CRC error, tune clock!\n");
+ dev_dbg(rtsx_dev(chip), "MSPro CRC error, tune clock!\n");
chip->rw_need_retry = 1;
ms_auto_tune_clock(chip);
}
u8 cnt, tmp;
u8 data[8];
- RTSX_DEBUGP("mspro_read_format_progress, short_data_len = %d\n",
+ dev_dbg(rtsx_dev(chip), "mspro_read_format_progress, short_data_len = %d\n",
short_data_len);
retval = ms_switch_clock(chip);
cur_progress = (data[4] << 24) | (data[5] << 16) |
(data[6] << 8) | data[7];
- RTSX_DEBUGP("total_progress = %d, cur_progress = %d\n",
- total_progress, cur_progress);
+ dev_dbg(rtsx_dev(chip), "total_progress = %d, cur_progress = %d\n",
+ total_progress, cur_progress);
if (total_progress == 0) {
ms_card->progress = 0;
do_div(ulltmp, total_progress);
ms_card->progress = (u16)ulltmp;
}
- RTSX_DEBUGP("progress = %d\n", ms_card->progress);
+ dev_dbg(rtsx_dev(chip), "progress = %d\n", ms_card->progress);
for (i = 0; i < 5000; i++) {
retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
}
}
- RTSX_DEBUGP("seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
seg_no, old_blk, new_blk);
while (total_sec_cnt) {
page_cnt = end_page - start_page;
- RTSX_DEBUGP("start_page = %d, end_page = %d, page_cnt = %d\n",
- start_page, end_page, page_cnt);
+ dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d, page_cnt = %d\n",
+ start_page, end_page, page_cnt);
if (srb->sc_data_direction == DMA_FROM_DEVICE) {
retval = ms_read_multiple_pages(chip,
}
}
- RTSX_DEBUGP("seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
seg_no, old_blk, new_blk);
start_page = 0;
if (CHK_MSPRO(ms_card)) {
if (ms_card->seq_mode) {
- RTSX_DEBUGP("MS Pro: stop transmission\n");
+ dev_dbg(rtsx_dev(chip), "MS Pro: stop transmission\n");
mspro_stop_seq_mode(chip);
ms_card->cleanup_counter = 0;
}
}
#ifdef MS_DELAY_WRITE
else if ((!CHK_MSPRO(ms_card)) && ms_card->delay_write.delay_write_flag) {
- RTSX_DEBUGP("MS: delay write\n");
+ dev_dbg(rtsx_dev(chip), "MS: delay write\n");
ms_delay_write(chip);
ms_card->cleanup_counter = 0;
}
* Micky Ching (micky_ching@realsil.com.cn)
*/
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-
#include <linux/blkdev.h>
#include <linux/kthread.h>
#include <linux/sched.h>
/* we've got a command, let's do it! */
else {
- RTSX_DEBUG(scsi_show_command(chip->srb));
+ scsi_show_command(chip);
rtsx_invoke_transport(chip->srb, chip);
}
int err = 0;
struct task_struct *th;
- RTSX_DEBUGP("Realtek PCI-E card reader detected\n");
+ dev_dbg(&pci->dev, "Realtek PCI-E card reader detected\n");
err = pci_enable_device(pci);
if (err < 0) {
#include <scsi/scsi_eh.h>
#include <scsi/scsi_host.h>
-#include "debug.h"
#include "trace.h"
#include "general.h"
rtsx_read_register(chip, 0xFF34, ®1);
rtsx_read_register(chip, 0xFF38, ®2);
- RTSX_DEBUGP("reg 0xFF34: 0x%x, reg 0xFF38: 0x%x\n", reg1, reg2);
+ dev_dbg(rtsx_dev(chip), "reg 0xFF34: 0x%x, reg 0xFF38: 0x%x\n",
+ reg1, reg2);
if ((reg1 & 0xC0) && (reg2 & 0xC0)) {
chip->sd_int = 1;
rtsx_write_register(chip, SDIO_CTRL, 0xFF,
if (chip->sdio_idle) {
if (!chip->sdio_aspm) {
- RTSX_DEBUGP("SDIO enter ASPM!\n");
+ dev_dbg(rtsx_dev(chip), "SDIO enter ASPM!\n");
rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC,
0x30 | (chip->aspm_level[1] << 2));
chip->sdio_aspm = 1;
}
} else {
if (chip->sdio_aspm) {
- RTSX_DEBUGP("SDIO exit ASPM!\n");
+ dev_dbg(rtsx_dev(chip), "SDIO exit ASPM!\n");
rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC, 0x30);
chip->sdio_aspm = 0;
}
{
int retval;
- RTSX_DEBUGP("%s: %d, card2lun = 0x%x\n", __func__,
- chip->sd_reset_counter, chip->card2lun[SD_CARD]);
+ dev_dbg(rtsx_dev(chip), "%s: %d, card2lun = 0x%x\n", __func__,
+ chip->sd_reset_counter, chip->card2lun[SD_CARD]);
if (chip->card2lun[SD_CARD] >= MAX_ALLOWED_LUN_CNT) {
clear_bit(SD_NR, &(chip->need_reset));
{
int retval;
- RTSX_DEBUGP("%s: %d, card2lun = 0x%x\n", __func__,
- chip->xd_reset_counter, chip->card2lun[XD_CARD]);
+ dev_dbg(rtsx_dev(chip), "%s: %d, card2lun = 0x%x\n", __func__,
+ chip->xd_reset_counter, chip->card2lun[XD_CARD]);
if (chip->card2lun[XD_CARD] >= MAX_ALLOWED_LUN_CNT) {
clear_bit(XD_NR, &(chip->need_reset));
{
int retval;
- RTSX_DEBUGP("%s: %d, card2lun = 0x%x\n", __func__,
- chip->ms_reset_counter, chip->card2lun[MS_CARD]);
+ dev_dbg(rtsx_dev(chip), "%s: %d, card2lun = 0x%x\n", __func__,
+ chip->ms_reset_counter, chip->card2lun[MS_CARD]);
if (chip->card2lun[MS_CARD] >= MAX_ALLOWED_LUN_CNT) {
clear_bit(MS_NR, &(chip->need_reset));
void rtsx_init_cards(struct rtsx_chip *chip)
{
if (RTSX_TST_DELINK(chip) && (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
- RTSX_DEBUGP("Reset chip in polling thread!\n");
+ dev_dbg(rtsx_dev(chip), "Reset chip in polling thread!\n");
rtsx_reset_chip(chip);
RTSX_CLR_DELINK(chip);
}
if (!(chip->card_exist & MS_CARD))
clear_bit(MS_NR, &(chip->need_release));
- RTSX_DEBUGP("chip->need_release = 0x%x\n",
- (unsigned int)(chip->need_release));
+ dev_dbg(rtsx_dev(chip), "chip->need_release = 0x%x\n",
+ (unsigned int)(chip->need_release));
#ifdef SUPPORT_OCP
if (chip->need_release) {
release_ms_card(chip);
}
- RTSX_DEBUGP("chip->card_exist = 0x%x\n", chip->card_exist);
+ dev_dbg(rtsx_dev(chip), "chip->card_exist = 0x%x\n",
+ chip->card_exist);
if (!chip->card_exist)
turn_off_led(chip, LED_GPIO);
}
if (chip->need_reset) {
- RTSX_DEBUGP("chip->need_reset = 0x%x\n",
- (unsigned int)(chip->need_reset));
+ dev_dbg(rtsx_dev(chip), "chip->need_reset = 0x%x\n",
+ (unsigned int)(chip->need_reset));
rtsx_reset_cards(chip);
}
if (chip->need_reinit) {
- RTSX_DEBUGP("chip->need_reinit = 0x%x\n",
- (unsigned int)(chip->need_reinit));
+ dev_dbg(rtsx_dev(chip), "chip->need_reinit = 0x%x\n",
+ (unsigned int)(chip->need_reinit));
rtsx_reinit_cards(chip, 0);
}
max_N = 120;
max_div = CLK_DIV_4;
- RTSX_DEBUGP("Switch SSC clock to %dMHz (cur_clk = %d)\n",
- clk, chip->cur_clk);
+ dev_dbg(rtsx_dev(chip), "Switch SSC clock to %dMHz (cur_clk = %d)\n",
+ clk, chip->cur_clk);
if ((clk <= 2) || (N > max_N))
TRACE_RET(chip, STATUS_FAIL);
N = (N + 2) * 2 - 2;
div++;
}
- RTSX_DEBUGP("N = %d, div = %d\n", N, div);
+ dev_dbg(rtsx_dev(chip), "N = %d, div = %d\n", N, div);
if (chip->ssc_en) {
ssc_depth = 0x01;
ssc_depth_mask = 0x03;
- RTSX_DEBUGP("ssc_depth = %d\n", ssc_depth);
+ dev_dbg(rtsx_dev(chip), "ssc_depth = %d\n", ssc_depth);
rtsx_init_cmd(chip);
rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ);
switch (clk) {
case CLK_20:
- RTSX_DEBUGP("Switch clock to 20MHz\n");
+ dev_dbg(rtsx_dev(chip), "Switch clock to 20MHz\n");
sel = SSC_80;
div = CLK_DIV_4;
mcu_cnt = 7;
break;
case CLK_30:
- RTSX_DEBUGP("Switch clock to 30MHz\n");
+ dev_dbg(rtsx_dev(chip), "Switch clock to 30MHz\n");
sel = SSC_120;
div = CLK_DIV_4;
mcu_cnt = 7;
break;
case CLK_40:
- RTSX_DEBUGP("Switch clock to 40MHz\n");
+ dev_dbg(rtsx_dev(chip), "Switch clock to 40MHz\n");
sel = SSC_80;
div = CLK_DIV_2;
mcu_cnt = 7;
break;
case CLK_50:
- RTSX_DEBUGP("Switch clock to 50MHz\n");
+ dev_dbg(rtsx_dev(chip), "Switch clock to 50MHz\n");
sel = SSC_100;
div = CLK_DIV_2;
mcu_cnt = 6;
break;
case CLK_60:
- RTSX_DEBUGP("Switch clock to 60MHz\n");
+ dev_dbg(rtsx_dev(chip), "Switch clock to 60MHz\n");
sel = SSC_120;
div = CLK_DIV_2;
mcu_cnt = 6;
break;
case CLK_80:
- RTSX_DEBUGP("Switch clock to 80MHz\n");
+ dev_dbg(rtsx_dev(chip), "Switch clock to 80MHz\n");
sel = SSC_80;
div = CLK_DIV_1;
mcu_cnt = 5;
break;
case CLK_100:
- RTSX_DEBUGP("Switch clock to 100MHz\n");
+ dev_dbg(rtsx_dev(chip), "Switch clock to 100MHz\n");
sel = SSC_100;
div = CLK_DIV_1;
mcu_cnt = 5;
break;
case CLK_120:
- RTSX_DEBUGP("Switch clock to 120MHz\n");
+ dev_dbg(rtsx_dev(chip), "Switch clock to 120MHz\n");
sel = SSC_120;
div = CLK_DIV_1;
mcu_cnt = 5;
break;
case CLK_150:
- RTSX_DEBUGP("Switch clock to 150MHz\n");
+ dev_dbg(rtsx_dev(chip), "Switch clock to 150MHz\n");
sel = SSC_150;
div = CLK_DIV_1;
mcu_cnt = 4;
break;
case CLK_200:
- RTSX_DEBUGP("Switch clock to 200MHz\n");
+ dev_dbg(rtsx_dev(chip), "Switch clock to 200MHz\n");
sel = SSC_200;
div = CLK_DIV_1;
mcu_cnt = 4;
break;
default:
- RTSX_DEBUGP("Try to switch to an illegal clock (%d)\n", clk);
+ dev_dbg(rtsx_dev(chip), "Try to switch to an illegal clock (%d)\n",
+ clk);
TRACE_RET(chip, STATUS_FAIL);
}
TRACE_RET(chip, STATUS_FAIL);
if (!chip->rw_need_retry) {
- RTSX_DEBUGP("RW fail, but no need to retry\n");
+ dev_dbg(rtsx_dev(chip), "RW fail, but no need to retry\n");
break;
}
} else {
break;
}
- RTSX_DEBUGP("Retry RW, (i = %d)\n", i);
+ dev_dbg(rtsx_dev(chip), "Retry RW, (i = %d)\n", i);
}
return retval;
} else if (card == XD_CARD) {
card_cd = XD_EXIST;
} else {
- RTSX_DEBUGP("Wrong card type: 0x%x\n", card);
+ dev_dbg(rtsx_dev(chip), "Wrong card type: 0x%x\n", card);
TRACE_RET(chip, STATUS_FAIL);
}
#ifndef __REALTEK_RTSX_CARD_H
#define __REALTEK_RTSX_CARD_H
-#include "debug.h"
#include "rtsx.h"
#include "rtsx_chip.h"
#include "rtsx_transport.h"
#ifndef DISABLE_CARD_INT
for (i = 0; i <= chip->max_lun; i++) {
- RTSX_DEBUGP("lun2card[%d] = 0x%02x\n", i, chip->lun2card[i]);
+ dev_dbg(rtsx_dev(chip), "lun2card[%d] = 0x%02x\n",
+ i, chip->lun2card[i]);
if (chip->lun2card[i] & XD_CARD)
reg |= XD_INT_EN;
/* Enable Bus Interrupt */
rtsx_writel(chip, RTSX_BIER, reg);
- RTSX_DEBUGP("RTSX_BIER: 0x%08x\n", reg);
+ dev_dbg(rtsx_dev(chip), "RTSX_BIER: 0x%08x\n", reg);
}
void rtsx_disable_bus_int(struct rtsx_chip *chip)
if (chip->sdio_in_charge)
sw_bypass_sd = 1;
}
- RTSX_DEBUGP("chip->sdio_in_charge = %d\n", chip->sdio_in_charge);
- RTSX_DEBUGP("chip->driver_first_load = %d\n", chip->driver_first_load);
- RTSX_DEBUGP("sw_bypass_sd = %d\n", sw_bypass_sd);
+ dev_dbg(rtsx_dev(chip), "chip->sdio_in_charge = %d\n",
+ chip->sdio_in_charge);
+ dev_dbg(rtsx_dev(chip), "chip->driver_first_load = %d\n",
+ chip->driver_first_load);
+ dev_dbg(rtsx_dev(chip), "sw_bypass_sd = %d\n",
+ sw_bypass_sd);
if (sw_bypass_sd) {
u8 cd_toggle_mask = 0;
chip->need_reset |= SD_CARD;
} else {
- RTSX_DEBUGP("Chip inserted with SDIO!\n");
+ dev_dbg(rtsx_dev(chip), "Chip inserted with SDIO!\n");
if (chip->asic_code) {
retval = sd_pull_ctl_enable(chip);
if (chip->hw_bypass_sd)
goto NextCard;
- RTSX_DEBUGP("In rtsx_reset_chip, chip->int_reg = 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "In %s, chip->int_reg = 0x%x\n", __func__,
chip->int_reg);
if (chip->int_reg & SD_EXIST) {
#ifdef HW_AUTO_SWITCH_SD_BUS
else
retval = rtsx_pre_handle_sdio_new(chip);
- RTSX_DEBUGP("chip->need_reset = 0x%x (rtsx_reset_chip)\n",
+ dev_dbg(rtsx_dev(chip), "chip->need_reset = 0x%x (rtsx_reset_chip)\n",
(unsigned int)(chip->need_reset));
#else /* HW_AUTO_SWITCH_SD_BUS */
retval = rtsx_pre_handle_sdio_old(chip);
if (chip->int_reg & CARD_EXIST)
RTSX_WRITE_REG(chip, SSC_CTL1, SSC_RSTB, SSC_RSTB);
- RTSX_DEBUGP("In rtsx_init_chip, chip->need_reset = 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "In %s, chip->need_reset = 0x%x\n", __func__,
(unsigned int)(chip->need_reset));
RTSX_WRITE_REG(chip, RCCTL, 0x01, 0x00);
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
- RTSX_DEBUGP("Value of phy register 0x1C is 0x%x\n", reg);
+ dev_dbg(rtsx_dev(chip), "Value of phy register 0x1C is 0x%x\n",
+ reg);
chip->ic_version = (reg >> 4) & 0x07;
if (reg & PHY_DEBUG_MODE)
chip->phy_debug_mode = 1;
}
RTSX_READ_REG(chip, PDINFO, &val);
- RTSX_DEBUGP("PDINFO: 0x%x\n", val);
+ dev_dbg(rtsx_dev(chip), "PDINFO: 0x%x\n", val);
if (val & AUX_PWR_DETECTED)
chip->aux_pwr_exist = 1;
else
chip->phy_debug_mode = 0;
RTSX_READ_REG(chip, PDINFO, &val);
- RTSX_DEBUGP("PDINFO: 0x%x\n", val);
+ dev_dbg(rtsx_dev(chip), "PDINFO: 0x%x\n", val);
if (val & AUX_PWR_DETECTED)
chip->aux_pwr_exist = 1;
else
chip->aux_pwr_exist = 0;
RTSX_READ_REG(chip, CARD_SHARE_MODE, &val);
- RTSX_DEBUGP("CARD_SHARE_MODE: 0x%x\n", val);
+ dev_dbg(rtsx_dev(chip), "CARD_SHARE_MODE: 0x%x\n", val);
if (val & 0x04)
chip->baro_pkg = QFN;
else
TRACE_RET(chip, STATUS_FAIL);
max_func = (u8)((lval >> 29) & 0x07);
- RTSX_DEBUGP("Max function number: %d\n", max_func);
+ dev_dbg(rtsx_dev(chip), "Max function number: %d\n", max_func);
if (max_func == 0x02)
SET_SDIO_EXIST(chip);
else
int retval;
unsigned int i;
- RTSX_DEBUGP("Vendor ID: 0x%04x, Product ID: 0x%04x\n",
- chip->vendor_id, chip->product_id);
+ dev_dbg(rtsx_dev(chip), "Vendor ID: 0x%04x, Product ID: 0x%04x\n",
+ chip->vendor_id, chip->product_id);
chip->ic_version = 0;
if (!check_sd_speed_prior(chip->sd_speed_prior))
chip->sd_speed_prior = 0x01040203;
- RTSX_DEBUGP("sd_speed_prior = 0x%08x\n", chip->sd_speed_prior);
+ dev_dbg(rtsx_dev(chip), "sd_speed_prior = 0x%08x\n",
+ chip->sd_speed_prior);
if (!check_sd_current_prior(chip->sd_current_prior))
chip->sd_current_prior = 0x00010203;
- RTSX_DEBUGP("sd_current_prior = 0x%08x\n", chip->sd_current_prior);
+ dev_dbg(rtsx_dev(chip), "sd_current_prior = 0x%08x\n",
+ chip->sd_current_prior);
if ((chip->sd_ddr_tx_phase > 31) || (chip->sd_ddr_tx_phase < 0))
chip->sd_ddr_tx_phase = 0;
RTSX_WRITE_REG(chip, FPDCTL, SSC_POWER_DOWN, 0);
wait_timeout(200);
RTSX_WRITE_REG(chip, CLK_DIV, 0x07, 0x07);
- RTSX_DEBUGP("chip->use_hw_setting = %d\n", chip->use_hw_setting);
+ dev_dbg(rtsx_dev(chip), "chip->use_hw_setting = %d\n",
+ chip->use_hw_setting);
if (CHECK_PID(chip, 0x5208)) {
retval = rts5208_init(chip);
if (chip->ss_en == 2)
chip->ss_en = 0;
- RTSX_DEBUGP("chip->asic_code = %d\n", chip->asic_code);
- RTSX_DEBUGP("chip->ic_version = 0x%x\n", chip->ic_version);
- RTSX_DEBUGP("chip->phy_debug_mode = %d\n", chip->phy_debug_mode);
- RTSX_DEBUGP("chip->aux_pwr_exist = %d\n", chip->aux_pwr_exist);
- RTSX_DEBUGP("chip->sdio_func_exist = %d\n", chip->sdio_func_exist);
- RTSX_DEBUGP("chip->hw_bypass_sd = %d\n", chip->hw_bypass_sd);
- RTSX_DEBUGP("chip->aspm_l0s_l1_en = %d\n", chip->aspm_l0s_l1_en);
- RTSX_DEBUGP("chip->lun_mode = %d\n", chip->lun_mode);
- RTSX_DEBUGP("chip->auto_delink_en = %d\n", chip->auto_delink_en);
- RTSX_DEBUGP("chip->ss_en = %d\n", chip->ss_en);
- RTSX_DEBUGP("chip->baro_pkg = %d\n", chip->baro_pkg);
+ dev_dbg(rtsx_dev(chip), "chip->asic_code = %d\n", chip->asic_code);
+ dev_dbg(rtsx_dev(chip), "chip->ic_version = 0x%x\n", chip->ic_version);
+ dev_dbg(rtsx_dev(chip), "chip->phy_debug_mode = %d\n",
+ chip->phy_debug_mode);
+ dev_dbg(rtsx_dev(chip), "chip->aux_pwr_exist = %d\n",
+ chip->aux_pwr_exist);
+ dev_dbg(rtsx_dev(chip), "chip->sdio_func_exist = %d\n",
+ chip->sdio_func_exist);
+ dev_dbg(rtsx_dev(chip), "chip->hw_bypass_sd = %d\n",
+ chip->hw_bypass_sd);
+ dev_dbg(rtsx_dev(chip), "chip->aspm_l0s_l1_en = %d\n",
+ chip->aspm_l0s_l1_en);
+ dev_dbg(rtsx_dev(chip), "chip->lun_mode = %d\n", chip->lun_mode);
+ dev_dbg(rtsx_dev(chip), "chip->auto_delink_en = %d\n",
+ chip->auto_delink_en);
+ dev_dbg(rtsx_dev(chip), "chip->ss_en = %d\n", chip->ss_en);
+ dev_dbg(rtsx_dev(chip), "chip->baro_pkg = %d\n", chip->baro_pkg);
if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) {
chip->card2lun[SD_CARD] = 0;
if (maybe_support_aspm)
chip->aspm_l0s_l1_en = 0x03;
- RTSX_DEBUGP("aspm_level[0] = 0x%02x, aspm_level[1] = 0x%02x\n",
- chip->aspm_level[0], chip->aspm_level[1]);
+ dev_dbg(rtsx_dev(chip), "aspm_level[0] = 0x%02x, aspm_level[1] = 0x%02x\n",
+ chip->aspm_level[0], chip->aspm_level[1]);
if (chip->aspm_l0s_l1_en) {
chip->aspm_enabled = 1;
dynamic_configure_sdio_aspm(chip);
} else {
if (!chip->sdio_aspm) {
- RTSX_DEBUGP("SDIO enter ASPM!\n");
+ dev_dbg(rtsx_dev(chip), "SDIO enter ASPM!\n");
rtsx_write_register(chip,
ASPM_FORCE_CTL, 0xFC,
0x30 | (chip->aspm_level[1] << 2));
chip->idle_counter++;
} else {
if (rtsx_get_stat(chip) != RTSX_STAT_IDLE) {
- RTSX_DEBUGP("Idle state!\n");
+ dev_dbg(rtsx_dev(chip), "Idle state!\n");
rtsx_set_stat(chip, RTSX_STAT_IDLE);
#if !defined(LED_AUTO_BLINK) && defined(REGULAR_BLINK)
#ifdef SUPPORT_OCP
if (CHECK_LUN_MODE(chip, SD_MS_2LUN)) {
-#ifdef CONFIG_RTS5208_DEBUG
if (chip->ocp_stat &
(SD_OC_NOW | SD_OC_EVER | MS_OC_NOW | MS_OC_EVER))
- RTSX_DEBUGP("Over current, OCPSTAT is 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
chip->ocp_stat);
-#endif
if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
if (chip->card_exist & SD_CARD) {
}
} else {
if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
- RTSX_DEBUGP("Over current, OCPSTAT is 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
chip->ocp_stat);
if (chip->card_exist & SD_CARD) {
rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN,
rtsx_set_phy_reg_bit(chip, 0x1C, 2);
if (chip->card_exist) {
- RTSX_DEBUGP("False card inserted, do force delink\n");
+ dev_dbg(rtsx_dev(chip), "False card inserted, do force delink\n");
if (enter_L1)
rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03, 1);
chip->auto_delink_cnt = delink_stage3_cnt + 1;
} else {
- RTSX_DEBUGP("No card inserted, do delink\n");
+ dev_dbg(rtsx_dev(chip), "No card inserted, do delink\n");
if (enter_L1)
rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03, 1);
}
if (chip->auto_delink_cnt == delink_stage2_cnt) {
- RTSX_DEBUGP("Try to do force delink\n");
+ dev_dbg(rtsx_dev(chip), "Try to do force delink\n");
if (enter_L1)
rtsx_exit_L1(chip);
int addr = RTSX_HCBAR + i * 4;
u32 reg;
reg = rtsx_readl(chip, addr);
- RTSX_DEBUGP("BAR (0x%02x): 0x%08x\n", addr, reg);
+ dev_dbg(rtsx_dev(chip), "BAR (0x%02x): 0x%08x\n", addr, reg);
}
rtsx_writel(chip, RTSX_HCBCTLR, STOP_CMD);
rtsx_writel(chip, RTSX_HDBCTLR, STOP_DMA);
u16 addr = 0xFE20 + (u16)i;
u8 val;
rtsx_read_register(chip, addr, &val);
- RTSX_DEBUGP("0x%04X: 0x%02x\n", addr, val);
+ dev_dbg(rtsx_dev(chip), "0x%04X: 0x%02x\n", addr, val);
}
rtsx_write_register(chip, DMACTL, 0x80, 0x80);
int dw_len, i, j;
int retval;
- RTSX_DEBUGP("%s\n", __func__);
-
if (!buf)
TRACE_RET(chip, STATUS_NOMEM);
else
dw_len = (len + offset) / 4;
- RTSX_DEBUGP("dw_len = %d\n", dw_len);
+ dev_dbg(rtsx_dev(chip), "dw_len = %d\n", dw_len);
data = vzalloc(dw_len * 4);
if (!data)
int dw_len, i, j;
int retval;
- RTSX_DEBUGP("%s\n", __func__);
-
if ((len + offset) % 4)
dw_len = (len + offset) / 4 + 1;
else
dw_len = (len + offset) / 4;
- RTSX_DEBUGP("dw_len = %d\n", dw_len);
+ dev_dbg(rtsx_dev(chip), "dw_len = %d\n", dw_len);
data = vmalloc(dw_len * 4);
if (!data)
continue;
tmp &= (~(u8)(1 << i));
- RTSX_DEBUGP("Write 0x%x to 0x%x\n", tmp, addr);
+ dev_dbg(rtsx_dev(chip), "Write 0x%x to 0x%x\n", tmp, addr);
RTSX_WRITE_REG(chip, EFUSE_DATA, 0xFF, tmp);
RTSX_WRITE_REG(chip, EFUSE_CTRL, 0xFF, 0xA0|addr);
RTSX_READ_REG(chip, IRQSTAT0, &val);
- RTSX_DEBUGP("IRQSTAT0: 0x%x\n", val);
+ dev_dbg(rtsx_dev(chip), "IRQSTAT0: 0x%x\n", val);
if (val & LINK_RDY_INT) {
- RTSX_DEBUGP("Delinked!\n");
+ dev_dbg(rtsx_dev(chip), "Delinked!\n");
rtsx_write_register(chip, IRQSTAT0, LINK_RDY_INT, LINK_RDY_INT);
return STATUS_FAIL;
}
{
u32 ultmp;
- RTSX_DEBUGP("%04x set pm_dstate to %d\n", chip->product_id, dstate);
+ dev_dbg(rtsx_dev(chip), "%04x set pm_dstate to %d\n",
+ chip->product_id, dstate);
if (CHK_SDIO_EXIST(chip)) {
u8 func_no;
func_no = 1;
rtsx_read_cfg_dw(chip, func_no, 0x84, &ultmp);
- RTSX_DEBUGP("pm_dstate of function %d: 0x%x\n", (int)func_no,
- ultmp);
+ dev_dbg(rtsx_dev(chip), "pm_dstate of function %d: 0x%x\n",
+ (int)func_no, ultmp);
rtsx_write_cfg_dw(chip, func_no, 0x84, 0xFF, dstate);
}
void rtsx_enter_ss(struct rtsx_chip *chip)
{
- RTSX_DEBUGP("Enter Selective Suspend State!\n");
+ dev_dbg(rtsx_dev(chip), "Enter Selective Suspend State!\n");
rtsx_write_register(chip, IRQSTAT0, LINK_RDY_INT, LINK_RDY_INT);
void rtsx_exit_ss(struct rtsx_chip *chip)
{
- RTSX_DEBUGP("Exit Selective Suspend State!\n");
+ dev_dbg(rtsx_dev(chip), "Exit Selective Suspend State!\n");
rtsx_exit_L1(chip);
{
int retval;
- RTSX_DEBUGP("rtsx_do_before_power_down, pm_stat = %d\n", pm_stat);
+ dev_dbg(rtsx_dev(chip), "%s, pm_stat = %d\n", __func__, pm_stat);
rtsx_set_stat(chip, RTSX_STAT_SUSPEND);
}
if (pm_stat == PM_S1) {
- RTSX_DEBUGP("Host enter S1\n");
+ dev_dbg(rtsx_dev(chip), "Host enter S1\n");
rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03,
HOST_ENTER_S1);
} else if (pm_stat == PM_S3) {
if (chip->s3_pwr_off_delay > 0)
wait_timeout(chip->s3_pwr_off_delay);
- RTSX_DEBUGP("Host enter S3\n");
+ dev_dbg(rtsx_dev(chip), "Host enter S3\n");
rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03,
HOST_ENTER_S3);
}
{
if (chip->aspm_l0s_l1_en && chip->dynamic_aspm) {
if (!chip->aspm_enabled) {
- RTSX_DEBUGP("Try to enable ASPM\n");
+ dev_dbg(rtsx_dev(chip), "Try to enable ASPM\n");
chip->aspm_enabled = 1;
if (chip->asic_code && CHECK_PID(chip, 0x5208))
if (chip->aspm_l0s_l1_en && chip->dynamic_aspm) {
if (chip->aspm_enabled) {
- RTSX_DEBUGP("Try to disable ASPM\n");
+ dev_dbg(rtsx_dev(chip), "Try to disable ASPM\n");
chip->aspm_enabled = 0;
if (chip->asic_code && CHECK_PID(chip, 0x5208))
u32 sd_ctl;
};
+static inline struct device *rtsx_dev(const struct rtsx_chip *chip)
+{
+ return &chip->rtsx->pci->dev;
+}
+
#define rtsx_set_stat(chip, stat) \
do { \
if ((stat) != RTSX_STAT_IDLE) { \
#include "ms.h"
#include "spi.h"
-void scsi_show_command(struct scsi_cmnd *srb)
+void scsi_show_command(struct rtsx_chip *chip)
{
+ struct scsi_cmnd *srb = chip->srb;
char *what = NULL;
int i, unknown_cmd = 0;
}
if (srb->cmnd[0] != TEST_UNIT_READY)
- RTSX_DEBUGP("Command %s (%d bytes)\n", what, srb->cmd_len);
+ dev_dbg(rtsx_dev(chip), "Command %s (%d bytes)\n",
+ what, srb->cmd_len);
if (unknown_cmd) {
- RTSX_DEBUGP("");
for (i = 0; i < srb->cmd_len && i < 16; i++)
- RTSX_DEBUGPN(" %02x", srb->cmnd[i]);
- RTSX_DEBUGPN("\n");
+ dev_dbg(rtsx_dev(chip), " %02x", srb->cmnd[i]);
+ dev_dbg(rtsx_dev(chip), "\n");
}
}
/* Accessing to any card is forbidden
* until the erase procedure of SD is completed
*/
- RTSX_DEBUGP("SD card being erased!\n");
+ dev_dbg(rtsx_dev(chip), "SD card being erased!\n");
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_READ_FORBIDDEN);
TRACE_RET(chip, TRANSPORT_FAILED);
}
if (get_lun_card(chip, lun) == SD_CARD) {
if (sd_card->sd_lock_status & SD_LOCKED) {
- RTSX_DEBUGP("SD card locked!\n");
+ dev_dbg(rtsx_dev(chip), "SD card locked!\n");
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_READ_FORBIDDEN);
TRACE_RET(chip, TRANSPORT_FAILED);
}
if (chip->rw_fail_cnt[lun] == 3) {
- RTSX_DEBUGP("read/write fail three times in succession\n");
+ dev_dbg(rtsx_dev(chip), "read/write fail three times in succession\n");
if (srb->sc_data_direction == DMA_FROM_DEVICE)
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
if (srb->sc_data_direction == DMA_TO_DEVICE) {
if (check_card_wp(chip, lun)) {
- RTSX_DEBUGP("Write protected card!\n");
+ dev_dbg(rtsx_dev(chip), "Write protected card!\n");
set_sense_type(chip, lun,
SENSE_TYPE_MEDIA_WRITE_PROTECT);
TRACE_RET(chip, TRANSPORT_FAILED);
*(ptr++) = (u8)(msg_cnt >> 16);
*(ptr++) = (u8)(msg_cnt >> 8);
*(ptr++) = (u8)msg_cnt;
- RTSX_DEBUGP("Trace message count is %d\n", msg_cnt);
+ dev_dbg(rtsx_dev(chip), "Trace message count is %d\n", msg_cnt);
for (i = 1; i <= msg_cnt; i++) {
int j, idx;
addr = srb->cmnd[4];
val = rtsx_readl(chip, addr);
- RTSX_DEBUGP("Host register (0x%x): 0x%x\n", addr, val);
+ dev_dbg(rtsx_dev(chip), "Host register (0x%x): 0x%x\n", addr, val);
buf[0] = (u8)(val >> 24);
buf[1] = (u8)(val >> 16);
len = min_t(u16, len, scsi_bufflen(srb));
if (srb->sc_data_direction == DMA_FROM_DEVICE)
- RTSX_DEBUGP("Read from device\n");
+ dev_dbg(rtsx_dev(chip), "Read from device\n");
else
- RTSX_DEBUGP("Write to device\n");
+ dev_dbg(rtsx_dev(chip), "Write to device\n");
retval = rtsx_transfer_data(chip, 0, scsi_sglist(srb), len,
scsi_sg_count(srb), srb->sc_data_direction, 1000);
status[0x17] = 0x00;
}
- RTSX_DEBUGP("status[0x17] = 0x%x\n", status[0x17]);
+ dev_dbg(rtsx_dev(chip), "status[0x17] = 0x%x\n", status[0x17]);
#endif
status[0x18] = 0x8A;
addr = ((u16)(srb->cmnd[4]) << 8) | srb->cmnd[5];
len = ((u16)(srb->cmnd[6]) << 8) | srb->cmnd[7];
- RTSX_DEBUGP("%s: func = %d, addr = 0x%x, len = %d\n", __func__, func,
- addr, len);
+ dev_dbg(rtsx_dev(chip), "%s: func = %d, addr = 0x%x, len = %d\n",
+ __func__, func, addr, len);
if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip))
func_max = 1;
addr = ((u16)(srb->cmnd[4]) << 8) | srb->cmnd[5];
len = ((u16)(srb->cmnd[6]) << 8) | srb->cmnd[7];
- RTSX_DEBUGP("%s: func = %d, addr = 0x%x\n", __func__, func, addr);
+ dev_dbg(rtsx_dev(chip), "%s: func = %d, addr = 0x%x\n",
+ __func__, func, addr);
if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip))
func_max = 1;
}
key_format = srb->cmnd[10] & 0x3F;
- RTSX_DEBUGP("key_format = 0x%x\n", key_format);
+ dev_dbg(rtsx_dev(chip), "key_format = 0x%x\n", key_format);
switch (key_format) {
case KF_GET_LOC_EKB:
}
key_format = srb->cmnd[10] & 0x3F;
- RTSX_DEBUGP("key_format = 0x%x\n", key_format);
+ dev_dbg(rtsx_dev(chip), "key_format = 0x%x\n", key_format);
switch (key_format) {
case KF_SET_LEAF_ID:
#define SENSE_TYPE_MEDIA_READ_FORBIDDEN 0x10
#endif
-void scsi_show_command(struct scsi_cmnd *srb);
+void scsi_show_command(struct rtsx_chip *chip);
void set_sense_type(struct rtsx_chip *chip, unsigned int lun, int sense_type);
void set_sense_data(struct rtsx_chip *chip, unsigned int lun, u8 err_code,
u8 sense_key, u32 info, u8 asc, u8 ascq,
#include "rtsx_transport.h"
#include "rtsx_chip.h"
#include "rtsx_card.h"
-#include "debug.h"
/***********************************************************************
* Scatter-gather transfer buffer access routines
* short-circuit all other processing
*/
if (rtsx_chk_stat(chip, RTSX_STAT_ABORT)) {
- RTSX_DEBUGP("-- command was aborted\n");
+ dev_dbg(rtsx_dev(chip), "-- command was aborted\n");
srb->result = DID_ABORT << 16;
goto Handle_Errors;
}
/* if there is a transport error, reset and don't auto-sense */
if (result == TRANSPORT_ERROR) {
- RTSX_DEBUGP("-- transport indicates error, resetting\n");
+ dev_dbg(rtsx_dev(chip), "-- transport indicates error, resetting\n");
srb->result = DID_ERROR << 16;
goto Handle_Errors;
}
timeleft = wait_for_completion_interruptible_timeout(
&trans_done, timeout * HZ / 1000);
if (timeleft <= 0) {
- RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
+ dev_dbg(rtsx_dev(chip), "chip->int_reg = 0x%x\n",
+ chip->int_reg);
err = -ETIMEDOUT;
TRACE_GOTO(chip, finish_send_cmd);
}
addr = sg_dma_address(sg_ptr);
len = sg_dma_len(sg_ptr);
- RTSX_DEBUGP("DMA addr: 0x%x, Len: 0x%x\n",
- (unsigned int)addr, len);
- RTSX_DEBUGP("*index = %d, *offset = %d\n", *index, *offset);
+ dev_dbg(rtsx_dev(chip), "DMA addr: 0x%x, Len: 0x%x\n",
+ (unsigned int)addr, len);
+ dev_dbg(rtsx_dev(chip), "*index = %d, *offset = %d\n",
+ *index, *offset);
addr += *offset;
sg_ptr = sg_next(sg_ptr);
}
- RTSX_DEBUGP("SG table count = %d\n", chip->sgi);
+ dev_dbg(rtsx_dev(chip), "SG table count = %d\n", chip->sgi);
val |= (u32)(dir & 0x01) << 29;
val |= ADMA_MODE;
timeleft = wait_for_completion_interruptible_timeout(
&trans_done, timeout * HZ / 1000);
if (timeleft <= 0) {
- RTSX_DEBUGP("Timeout (%s %d)\n", __func__, __LINE__);
- RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
+ dev_dbg(rtsx_dev(chip), "Timeout (%s %d)\n",
+ __func__, __LINE__);
+ dev_dbg(rtsx_dev(chip), "chip->int_reg = 0x%x\n",
+ chip->int_reg);
err = -ETIMEDOUT;
goto out;
}
timeleft = wait_for_completion_interruptible_timeout(
&trans_done, timeout * HZ / 1000);
if (timeleft <= 0) {
- RTSX_DEBUGP("Timeout (%s %d)\n", __func__, __LINE__);
- RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
+ dev_dbg(rtsx_dev(chip), "Timeout (%s %d)\n",
+ __func__, __LINE__);
+ dev_dbg(rtsx_dev(chip), "chip->int_reg = 0x%x\n",
+ chip->int_reg);
err = -ETIMEDOUT;
goto out;
}
unsigned int len = sg_dma_len(sg_ptr);
u8 option;
- RTSX_DEBUGP("DMA addr: 0x%x, Len: 0x%x\n",
- (unsigned int)addr, len);
+ dev_dbg(rtsx_dev(chip), "DMA addr: 0x%x, Len: 0x%x\n",
+ (unsigned int)addr, len);
if (j == (sg_cnt - 1))
option = SG_VALID | SG_END | SG_TRANS_DATA;
sg_ptr = sg_next(sg_ptr);
}
- RTSX_DEBUGP("SG table count = %d\n", chip->sgi);
+ dev_dbg(rtsx_dev(chip), "SG table count = %d\n", chip->sgi);
val |= (u32)(dir & 0x01) << 29;
val |= ADMA_MODE;
timeleft = wait_for_completion_interruptible_timeout(
&trans_done, timeout * HZ / 1000);
if (timeleft <= 0) {
- RTSX_DEBUGP("Timeout (%s %d)\n", __func__, __LINE__);
- RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
+ dev_dbg(rtsx_dev(chip), "Timeout (%s %d)\n",
+ __func__, __LINE__);
+ dev_dbg(rtsx_dev(chip), "chip->int_reg = 0x%x\n",
+ chip->int_reg);
err = -ETIMEDOUT;
goto out;
}
timeleft = wait_for_completion_interruptible_timeout(
&trans_done, timeout * HZ / 1000);
if (timeleft <= 0) {
- RTSX_DEBUGP("Timeout (%s %d)\n", __func__, __LINE__);
- RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
+ dev_dbg(rtsx_dev(chip), "Timeout (%s %d)\n",
+ __func__, __LINE__);
+ dev_dbg(rtsx_dev(chip), "chip->int_reg = 0x%x\n",
+ chip->int_reg);
err = -ETIMEDOUT;
goto out;
}
timeleft = wait_for_completion_interruptible_timeout(
&trans_done, timeout * HZ / 1000);
if (timeleft <= 0) {
- RTSX_DEBUGP("Timeout (%s %d)\n", __func__, __LINE__);
- RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
+ dev_dbg(rtsx_dev(chip), "Timeout (%s %d)\n",
+ __func__, __LINE__);
+ dev_dbg(rtsx_dev(chip), "chip->int_reg = 0x%x\n",
+ chip->int_reg);
err = -ETIMEDOUT;
goto out;
}
{
int err = 0;
- RTSX_DEBUGP("use_sg = %d\n", use_sg);
+ dev_dbg(rtsx_dev(chip), "use_sg = %d\n", use_sg);
/* don't transfer data during abort processing */
if (rtsx_chk_stat(chip, RTSX_STAT_ABORT))
sd_clr_err_code(chip);
- RTSX_DEBUGP("SD/MMC CMD %d, arg = 0x%08x\n", cmd_idx, arg);
+ dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d, arg = 0x%08x\n", cmd_idx, arg);
if (rsp_type == SD_RSP_TYPE_R1b)
timeout = 3000;
u8 val;
rtsx_read_register(chip, REG_SD_STAT1, &val);
- RTSX_DEBUGP("SD_STAT1: 0x%x\n", val);
+ dev_dbg(rtsx_dev(chip), "SD_STAT1: 0x%x\n", val);
rtsx_read_register(chip, REG_SD_CFG3, &val);
- RTSX_DEBUGP("SD_CFG3: 0x%x\n", val);
+ dev_dbg(rtsx_dev(chip), "SD_CFG3: 0x%x\n", val);
if (retval == -ETIMEDOUT) {
if (rsp_type & SD_WAIT_BUSY_END) {
if (ptr[1] & 0x7F)
#endif
{
- RTSX_DEBUGP("ptr[1]: 0x%02x\n", ptr[1]);
+ dev_dbg(rtsx_dev(chip), "ptr[1]: 0x%02x\n",
+ ptr[1]);
TRACE_RET(chip, STATUS_FAIL);
}
if (ptr[2] & 0xFF) {
- RTSX_DEBUGP("ptr[2]: 0x%02x\n", ptr[2]);
+ dev_dbg(rtsx_dev(chip), "ptr[2]: 0x%02x\n",
+ ptr[2]);
TRACE_RET(chip, STATUS_FAIL);
}
if (ptr[3] & 0x80) {
- RTSX_DEBUGP("ptr[3]: 0x%02x\n", ptr[3]);
+ dev_dbg(rtsx_dev(chip), "ptr[3]: 0x%02x\n",
+ ptr[3]);
TRACE_RET(chip, STATUS_FAIL);
}
if (ptr[3] & 0x01)
rtsx_init_cmd(chip);
if (cmd_len) {
- RTSX_DEBUGP("SD/MMC CMD %d\n", cmd[0] - 0x40);
+ dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", cmd[0] - 0x40);
for (i = 0; i < (cmd_len < 6 ? cmd_len : 6); i++)
rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0 + i,
0xFF, cmd[i]);
rtsx_init_cmd(chip);
if (cmd_len) {
- RTSX_DEBUGP("SD/MMC CMD %d\n", cmd[0] - 0x40);
+ dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", cmd[0] - 0x40);
for (i = 0; i < (cmd_len < 6 ? cmd_len : 6); i++) {
rtsx_add_cmd(chip, WRITE_REG_CMD,
REG_SD_CMD0 + i, 0xFF, cmd[i]);
memcpy(sd_card->raw_csd, rsp + 1, 15);
- RTSX_DEBUGP("CSD Response:\n");
+ dev_dbg(rtsx_dev(chip), "CSD Response:\n");
RTSX_DUMP(sd_card->raw_csd, 16);
csd_ver = (rsp[1] & 0xc0) >> 6;
- RTSX_DEBUGP("csd_ver = %d\n", csd_ver);
+ dev_dbg(rtsx_dev(chip), "csd_ver = %d\n", csd_ver);
trans_speed = rsp[4];
if ((trans_speed & 0x07) == 0x02) {
if (rsp[15] & 0x30)
chip->card_wp |= SD_CARD;
- RTSX_DEBUGP("CSD WP Status: 0x%x\n", rsp[15]);
+ dev_dbg(rtsx_dev(chip), "CSD WP Status: 0x%x\n", rsp[15]);
}
return STATUS_SUCCESS;
else
sd_card->sd_lock_status &= ~SD_LOCKED;
- RTSX_DEBUGP("sd_card->sd_lock_status = 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "sd_card->sd_lock_status = 0x%x\n",
sd_card->sd_lock_status);
if (rsp[1] & 0x01)
SD_DAT1_STATUS | SD_DAT0_STATUS)) !=
(SD_CMD_STATUS | SD_DAT3_STATUS | SD_DAT2_STATUS |
SD_DAT1_STATUS | SD_DAT0_STATUS)) {
- RTSX_DEBUGP("SD_BUS_STAT: 0x%x\n", stat);
+ dev_dbg(rtsx_dev(chip), "SD_BUS_STAT: 0x%x\n", stat);
rtsx_write_register(chip, SD_BUS_STAT,
SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
rtsx_write_register(chip, CARD_CLK_EN, 0xFF, 0);
int retval;
int ddr_rx = 0;
- RTSX_DEBUGP("sd_change_phase (sample_point = %d, tune_dir = %d)\n",
- sample_point, tune_dir);
+ dev_dbg(rtsx_dev(chip), "sd_change_phase (sample_point = %d, tune_dir = %d)\n",
+ sample_point, tune_dir);
if (tune_dir == TUNE_RX) {
SD_VP_CTL = SD_VPRX_CTL;
} else {
#ifdef CONFIG_RTS5208_DEBUG
rtsx_read_register(chip, SD_VP_CTL, &val);
- RTSX_DEBUGP("SD_VP_CTL: 0x%x\n", val);
+ dev_dbg(rtsx_dev(chip), "SD_VP_CTL: 0x%x\n", val);
rtsx_read_register(chip, SD_DCMPS_CTL, &val);
- RTSX_DEBUGP("SD_DCMPS_CTL: 0x%x\n", val);
+ dev_dbg(rtsx_dev(chip), "SD_DCMPS_CTL: 0x%x\n", val);
#endif
if (ddr_rx) {
Fail:
#ifdef CONFIG_RTS5208_DEBUG
rtsx_read_register(chip, SD_VP_CTL, &val);
- RTSX_DEBUGP("SD_VP_CTL: 0x%x\n", val);
+ dev_dbg(rtsx_dev(chip), "SD_VP_CTL: 0x%x\n", val);
rtsx_read_register(chip, SD_DCMPS_CTL, &val);
- RTSX_DEBUGP("SD_DCMPS_CTL: 0x%x\n", val);
+ dev_dbg(rtsx_dev(chip), "SD_DCMPS_CTL: 0x%x\n", val);
#endif
-
rtsx_write_register(chip, SD_DCMPS_CTL, DCMPS_CHANGE, 0);
rtsx_write_register(chip, SD_VP_CTL, PHASE_CHANGE, 0);
wait_timeout(10);
int retval;
u8 cmd[5], buf[64];
- RTSX_DEBUGP("sd_check_switch_mode (mode = %d, func_group = %d, func_to_switch = %d)\n",
- mode, func_group, func_to_switch);
+ dev_dbg(rtsx_dev(chip), "sd_check_switch_mode (mode = %d, func_group = %d, func_to_switch = %d)\n",
+ mode, func_group, func_to_switch);
cmd[0] = 0x40 | SWITCH;
cmd[1] = mode;
sd_card->func_group3_mask = buf[0x09];
sd_card->func_group4_mask = buf[0x07];
- RTSX_DEBUGP("func_group1_mask = 0x%02x\n", buf[0x0D]);
- RTSX_DEBUGP("func_group2_mask = 0x%02x\n", buf[0x0B]);
- RTSX_DEBUGP("func_group3_mask = 0x%02x\n", buf[0x09]);
- RTSX_DEBUGP("func_group4_mask = 0x%02x\n", buf[0x07]);
+ dev_dbg(rtsx_dev(chip), "func_group1_mask = 0x%02x\n",
+ buf[0x0D]);
+ dev_dbg(rtsx_dev(chip), "func_group2_mask = 0x%02x\n",
+ buf[0x0B]);
+ dev_dbg(rtsx_dev(chip), "func_group3_mask = 0x%02x\n",
+ buf[0x09]);
+ dev_dbg(rtsx_dev(chip), "func_group4_mask = 0x%02x\n",
+ buf[0x07]);
} else {
/* Maximum current consumption, check whether current is
* acceptable; bit[511:496] = 0x0000 means some error happened.
*/
u16 cc = ((u16)buf[0] << 8) | buf[1];
- RTSX_DEBUGP("Maximum current consumption: %dmA\n", cc);
+ dev_dbg(rtsx_dev(chip), "Maximum current consumption: %dmA\n",
+ cc);
if ((cc == 0) || (cc > 800))
TRACE_RET(chip, STATUS_FAIL);
RTSX_READ_REG(chip, SD_STAT1, &stat);
if (stat & SD_CRC16_ERR) {
- RTSX_DEBUGP("SD CRC16 error when switching mode\n");
+ dev_dbg(rtsx_dev(chip), "SD CRC16 error when switching mode\n");
TRACE_RET(chip, STATUS_FAIL);
}
}
break;
}
- RTSX_DEBUGP("SD_FUNC_GROUP_1: func_to_switch = 0x%02x", func_to_switch);
+ dev_dbg(rtsx_dev(chip), "SD_FUNC_GROUP_1: func_to_switch = 0x%02x",
+ func_to_switch);
#ifdef SUPPORT_SD_LOCK
if ((sd_card->sd_lock_status & SD_SDR_RST)
&& (DDR50_SUPPORT == func_to_switch)
&& (sd_card->func_group1_mask & SDR50_SUPPORT_MASK)) {
func_to_switch = SDR50_SUPPORT;
- RTSX_DEBUGP("Using SDR50 instead of DDR50 for SD Lock\n");
+ dev_dbg(rtsx_dev(chip), "Using SDR50 instead of DDR50 for SD Lock\n");
}
#endif
break;
}
- RTSX_DEBUGP("SD_FUNC_GROUP_4: func_to_switch = 0x%02x", func_to_switch);
+ dev_dbg(rtsx_dev(chip), "SD_FUNC_GROUP_4: func_to_switch = 0x%02x",
+ func_to_switch);
if (func_to_switch <= CURRENT_LIMIT_800) {
retval = sd_check_switch(chip, SD_FUNC_GROUP_4, func_to_switch,
if (sd_check_err_code(chip, SD_NO_CARD))
TRACE_RET(chip, STATUS_FAIL);
}
- RTSX_DEBUGP("Switch current limit finished! (%d)\n", retval);
+ dev_dbg(rtsx_dev(chip), "Switch current limit finished! (%d)\n",
+ retval);
}
if (CHK_SD_DDR50(sd_card))
}
udelay(100);
}
- RTSX_DEBUGP("SD_DATA_STATE: 0x%02x\n", val);
+ dev_dbg(rtsx_dev(chip), "SD_DATA_STATE: 0x%02x\n", val);
return retval;
}
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
- RTSX_DEBUGP("sd ddr tuning rx\n");
+ dev_dbg(rtsx_dev(chip), "sd ddr tuning rx\n");
retval = sd_send_cmd_get_rsp(chip, APP_CMD, sd_card->sd_addr,
SD_RSP_TYPE_R1, NULL, 0);
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
- RTSX_DEBUGP("mmc ddr tuning rx\n");
+ dev_dbg(rtsx_dev(chip), "mmc ddr tuning rx\n");
cmd[0] = 0x40 | SEND_EXT_CSD;
cmd[1] = 0;
}
if (cont_path_cnt == 0) {
- RTSX_DEBUGP("No continuous phase path\n");
+ dev_dbg(rtsx_dev(chip), "No continuous phase path\n");
goto Search_Finish;
} else {
int idx = cont_path_cnt - 1;
final_path_idx = i;
}
- RTSX_DEBUGP("path[%d].start = %d\n", i, path[i].start);
- RTSX_DEBUGP("path[%d].end = %d\n", i, path[i].end);
- RTSX_DEBUGP("path[%d].len = %d\n", i, path[i].len);
- RTSX_DEBUGP("path[%d].mid = %d\n", i, path[i].mid);
- RTSX_DEBUGP("\n");
+ dev_dbg(rtsx_dev(chip), "path[%d].start = %d\n",
+ i, path[i].start);
+ dev_dbg(rtsx_dev(chip), "path[%d].end = %d\n", i, path[i].end);
+ dev_dbg(rtsx_dev(chip), "path[%d].len = %d\n", i, path[i].len);
+ dev_dbg(rtsx_dev(chip), "path[%d].mid = %d\n", i, path[i].mid);
+ dev_dbg(rtsx_dev(chip), "\n");
}
if (tune_dir == TUNE_TX) {
}
Search_Finish:
- RTSX_DEBUGP("Final chosen phase: %d\n", final_phase);
+ dev_dbg(rtsx_dev(chip), "Final chosen phase: %d\n", final_phase);
return final_phase;
}
phase_map = raw_phase_map[0] & raw_phase_map[1] & raw_phase_map[2];
for (i = 0; i < 3; i++)
- RTSX_DEBUGP("RX raw_phase_map[%d] = 0x%08x\n", i,
- raw_phase_map[i]);
+ dev_dbg(rtsx_dev(chip), "RX raw_phase_map[%d] = 0x%08x\n",
+ i, raw_phase_map[i]);
- RTSX_DEBUGP("RX phase_map = 0x%08x\n", phase_map);
+ dev_dbg(rtsx_dev(chip), "RX phase_map = 0x%08x\n", phase_map);
final_phase = sd_search_final_phase(chip, phase_map, TUNE_RX);
if (final_phase == 0xFF)
RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0);
- RTSX_DEBUGP("DDR TX pre tune phase_map = 0x%08x\n", phase_map);
+ dev_dbg(rtsx_dev(chip), "DDR TX pre tune phase_map = 0x%08x\n",
+ phase_map);
final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX);
if (final_phase == 0xFF)
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
- RTSX_DEBUGP("DDR TX pre tune phase: %d\n", (int)final_phase);
+ dev_dbg(rtsx_dev(chip), "DDR TX pre tune phase: %d\n",
+ (int)final_phase);
return STATUS_SUCCESS;
}
phase_map = raw_phase_map[0] & raw_phase_map[1] & raw_phase_map[2];
for (i = 0; i < 3; i++)
- RTSX_DEBUGP("TX raw_phase_map[%d] = 0x%08x\n",
+ dev_dbg(rtsx_dev(chip), "TX raw_phase_map[%d] = 0x%08x\n",
i, raw_phase_map[i]);
- RTSX_DEBUGP("TX phase_map = 0x%08x\n", phase_map);
+ dev_dbg(rtsx_dev(chip), "TX phase_map = 0x%08x\n", phase_map);
final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX);
if (final_phase == 0xFF)
#ifdef SUPPORT_OCP
if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
- RTSX_DEBUGP("Over current, OCPSTAT is 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
chip->ocp_stat);
TRACE_RET(chip, STATUS_FAIL);
}
TRACE_RET(chip, STATUS_FAIL);
}
- RTSX_DEBUGP("ACMD13:\n");
+ dev_dbg(rtsx_dev(chip), "ACMD13:\n");
RTSX_DUMP(buf, 64);
sd_card_type = ((u16)buf[2] << 8) | buf[3];
- RTSX_DEBUGP("sd_card_type = 0x%04x\n", sd_card_type);
+ dev_dbg(rtsx_dev(chip), "sd_card_type = 0x%04x\n", sd_card_type);
if ((sd_card_type == 0x0001) || (sd_card_type == 0x0002)) {
/* ROM card or OTP */
chip->card_wp |= SD_CARD;
if (retval == STATUS_SUCCESS) {
int func_num = (rsp[1] >> 4) & 0x07;
if (func_num) {
- RTSX_DEBUGP("SD_IO card (Function number: %d)!\n", func_num);
+ dev_dbg(rtsx_dev(chip), "SD_IO card (Function number: %d)!\n",
+ func_num);
chip->sd_io = 1;
TRACE_RET(chip, STATUS_FAIL);
}
sd_dummy_clock(chip);
}
- RTSX_DEBUGP("Normal card!\n");
+ dev_dbg(rtsx_dev(chip), "Normal card!\n");
}
/* Start Initialization Process of SD Card */
CLR_SD_HCXC(sd_card);
support_1v8 = 0;
}
- RTSX_DEBUGP("support_1v8 = %d\n", support_1v8);
+ dev_dbg(rtsx_dev(chip), "support_1v8 = %d\n", support_1v8);
if (support_1v8) {
retval = sd_voltage_switch(chip);
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, SWITCH_ERR);
- RTSX_DEBUGP("SD/MMC CMD %d\n", BUSTEST_R);
+ dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", BUSTEST_R);
rtsx_init_cmd(chip);
ptr = rtsx_get_cmd_data(chip) + 1;
if (width == MMC_8BIT_BUS) {
- RTSX_DEBUGP("BUSTEST_R [8bits]: 0x%02x 0x%02x\n", ptr[0],
- ptr[1]);
+ dev_dbg(rtsx_dev(chip), "BUSTEST_R [8bits]: 0x%02x 0x%02x\n",
+ ptr[0], ptr[1]);
if ((ptr[0] == 0xAA) && (ptr[1] == 0x55)) {
u8 rsp[5];
u32 arg;
return SWITCH_SUCCESS;
}
} else {
- RTSX_DEBUGP("BUSTEST_R [4bits]: 0x%02x\n", ptr[0]);
+ dev_dbg(rtsx_dev(chip), "BUSTEST_R [4bits]: 0x%02x\n", ptr[0]);
if (ptr[0] == 0xA5) {
u8 rsp[5];
u32 arg;
CLR_MMC_HS(sd_card);
- RTSX_DEBUGP("SD/MMC CMD %d\n", SEND_EXT_CSD);
+ dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n", SEND_EXT_CSD);
rtsx_init_cmd(chip);
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
- RTSX_DEBUGP("sd_card->sd_type = 0x%x\n", sd_card->sd_type);
+ dev_dbg(rtsx_dev(chip), "sd_card->sd_type = 0x%x\n", sd_card->sd_type);
return STATUS_SUCCESS;
}
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
- RTSX_DEBUGP("In reset_mmc_only, sd_card->sd_type = 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "In reset_mmc_only, sd_card->sd_type = 0x%x\n",
sd_card->sd_type);
return STATUS_SUCCESS;
int retval;
if (srb->sc_data_direction == DMA_FROM_DEVICE) {
- RTSX_DEBUGP("sd_rw: Read %d %s from 0x%x\n", sector_cnt,
- (sector_cnt > 1) ? "sectors" : "sector", start_sector);
+ dev_dbg(rtsx_dev(chip), "sd_rw: Read %d %s from 0x%x\n",
+ sector_cnt, (sector_cnt > 1) ? "sectors" : "sector",
+ start_sector);
} else {
- RTSX_DEBUGP("sd_rw: Write %d %s to 0x%x\n", sector_cnt,
- (sector_cnt > 1) ? "sectors" : "sector", start_sector);
+ dev_dbg(rtsx_dev(chip), "sd_rw: Write %d %s to 0x%x\n",
+ sector_cnt, (sector_cnt > 1) ? "sectors" : "sector",
+ start_sector);
}
sd_card->cleanup_counter = 0;
rtsx_send_cmd_no_wait(chip);
} else {
if (srb->sc_data_direction == DMA_FROM_DEVICE) {
- RTSX_DEBUGP("SD/MMC CMD %d\n", READ_MULTIPLE_BLOCK);
+ dev_dbg(rtsx_dev(chip), "SD/MMC CMD %d\n",
+ READ_MULTIPLE_BLOCK);
rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD0, 0xFF,
0x40 | READ_MULTIPLE_BLOCK);
rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CMD1, 0xFF,
rtsx_clear_sd_error(chip);
if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
chip->rw_need_retry = 0;
- RTSX_DEBUGP("No card exist, exit sd_rw\n");
+ dev_dbg(rtsx_dev(chip), "No card exist, exit sd_rw\n");
TRACE_RET(chip, STATUS_FAIL);
}
}
if (stat & (SD_CRC7_ERR | SD_CRC16_ERR | SD_CRC_WRITE_ERR)) {
- RTSX_DEBUGP("SD CRC error, tune clock!\n");
+ dev_dbg(rtsx_dev(chip), "SD CRC error, tune clock!\n");
sd_set_err_code(chip, SD_CRC_ERR);
TRACE_GOTO(chip, RW_FAIL);
}
if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
chip->rw_need_retry = 0;
- RTSX_DEBUGP("No card exist, exit sd_rw\n");
+ dev_dbg(rtsx_dev(chip), "No card exist, exit sd_rw\n");
TRACE_RET(chip, STATUS_FAIL);
}
int stat_idx = 0;
int rty_cnt = 0;
- RTSX_DEBUGP("EXT SD/MMC CMD %d\n", cmd_idx);
+ dev_dbg(rtsx_dev(chip), "EXT SD/MMC CMD %d\n", cmd_idx);
if (rsp_type == SD_RSP_TYPE_R1b)
timeout = 3000;
memcpy(rsp, rtsx_get_cmd_data(chip), min_len);
- RTSX_DEBUGP("min_len = %d\n", min_len);
- RTSX_DEBUGP("Response in cmd buf: 0x%x 0x%x 0x%x 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "min_len = %d\n", min_len);
+ dev_dbg(rtsx_dev(chip), "Response in cmd buf: 0x%x 0x%x 0x%x 0x%x\n",
rsp[0], rsp[1], rsp[2], rsp[3]);
}
} else {
bus_width = SD_BUS_WIDTH_4;
}
- RTSX_DEBUGP("bus_width = %d\n", bus_width);
+ dev_dbg(rtsx_dev(chip), "bus_width = %d\n", bus_width);
#else
bus_width = SD_BUS_WIDTH_4;
#endif
retval = sd_update_lock_status(chip);
if (retval != STATUS_SUCCESS) {
- RTSX_DEBUGP("Lock command fail!\n");
+ dev_dbg(rtsx_dev(chip), "Lock command fail!\n");
lock_cmd_fail = 1;
}
}
#ifdef SUPPORT_SD_LOCK
if (cmd_idx == LOCK_UNLOCK) {
if (!lock_cmd_fail) {
- RTSX_DEBUGP("lock_cmd_type = 0x%x\n", lock_cmd_type);
+ dev_dbg(rtsx_dev(chip), "lock_cmd_type = 0x%x\n",
+ lock_cmd_type);
if (lock_cmd_type & SD_CLR_PWD)
sd_card->sd_lock_status &= ~SD_PWD_EXIST;
sd_card->sd_lock_status |= SD_PWD_EXIST;
}
- RTSX_DEBUGP("sd_lock_state = 0x%x, sd_card->sd_lock_status = 0x%x\n",
- sd_lock_state, sd_card->sd_lock_status);
+ dev_dbg(rtsx_dev(chip), "sd_lock_state = 0x%x, sd_card->sd_lock_status = 0x%x\n",
+ sd_lock_state, sd_card->sd_lock_status);
if (sd_lock_state ^ (sd_card->sd_lock_status & SD_LOCKED)) {
sd_card->sd_lock_notify = 1;
if (sd_lock_state) {
}
rtsx_stor_set_xfer_buf(sd_card->rsp, count, srb);
- RTSX_DEBUGP("Response length: %d\n", data_len);
- RTSX_DEBUGP("Response: 0x%x 0x%x 0x%x 0x%x\n", sd_card->rsp[0],
- sd_card->rsp[1], sd_card->rsp[2], sd_card->rsp[3]);
+ dev_dbg(rtsx_dev(chip), "Response length: %d\n", data_len);
+ dev_dbg(rtsx_dev(chip), "Response: 0x%x 0x%x 0x%x 0x%x\n",
+ sd_card->rsp[0], sd_card->rsp[1],
+ sd_card->rsp[2], sd_card->rsp[3]);
scsi_set_resid(srb, 0);
return TRANSPORT_GOOD;
struct sd_info *sd_card = &(chip->sd_card);
if (sd_card->seq_mode) {
- RTSX_DEBUGP("SD: stop transmission\n");
+ dev_dbg(rtsx_dev(chip), "SD: stop transmission\n");
sd_stop_seq_mode(chip);
sd_card->cleanup_counter = 0;
}
struct sd_info *sd_card = &(chip->sd_card);
int retval;
- RTSX_DEBUGP("release_sd_card\n");
-
chip->card_ready &= ~SD_CARD;
chip->card_fail &= ~SD_CARD;
chip->card_wp &= ~SD_CARD;
{
struct spi_info *spi = &(chip->spi);
- RTSX_DEBUGP("spi_get_status: err_code = 0x%x\n", spi->err_code);
+ dev_dbg(rtsx_dev(chip), "spi_get_status: err_code = 0x%x\n",
+ spi->err_code);
rtsx_stor_set_xfer_buf(&(spi->err_code),
min_t(int, scsi_bufflen(srb), 1), srb);
scsi_set_resid(srb, scsi_bufflen(srb) - 1);
spi->clk_div = ((u16)(srb->cmnd[4]) << 8) | srb->cmnd[5];
spi->write_en = srb->cmnd[6];
- RTSX_DEBUGP("spi_set_parameter: spi_clock = %d, clk_div = %d, write_en = %d\n",
- spi->spi_clock, spi->clk_div, spi->write_en);
+ dev_dbg(rtsx_dev(chip), "spi_set_parameter: spi_clock = %d, clk_div = %d, write_en = %d\n",
+ spi->spi_clock, spi->clk_div, spi->write_en);
return STATUS_SUCCESS;
}
#define TRACE_RET(chip, ret) \
do { \
char *_file = filename(__FILE__); \
- RTSX_DEBUGP("[%s][%s]:[%d]\n", _file, __func__, __LINE__); \
+ dev_dbg(rtsx_dev(chip), "[%s][%s]:[%d]\n", _file, \
+ __func__, __LINE__); \
(chip)->trace_msg[(chip)->msg_idx].line = (u16)(__LINE__); \
strncpy((chip)->trace_msg[(chip)->msg_idx].func, __func__, MSG_FUNC_LEN-1); \
strncpy((chip)->trace_msg[(chip)->msg_idx].file, _file, MSG_FILE_LEN-1); \
#define TRACE_GOTO(chip, label) \
do { \
char *_file = filename(__FILE__); \
- RTSX_DEBUGP("[%s][%s]:[%d]\n", _file, __func__, __LINE__); \
+ dev_dbg(rtsx_dev(chip), "[%s][%s]:[%d]\n", _file, \
+ __func__, __LINE__); \
(chip)->trace_msg[(chip)->msg_idx].line = (u16)(__LINE__); \
strncpy((chip)->trace_msg[(chip)->msg_idx].func, __func__, MSG_FUNC_LEN-1); \
strncpy((chip)->trace_msg[(chip)->msg_idx].file, _file, MSG_FILE_LEN-1); \
#ifdef CONFIG_RTS5208_DEBUG
#define RTSX_DUMP(buf, buf_len) \
- print_hex_dump(KERN_DEBUG, RTSX_STOR, DUMP_PREFIX_NONE, \
- 16, 1, (buf), (buf_len), false)
+ print_hex_dump(KERN_DEBUG, KBUILD_MODNAME ": ", \
+ DUMP_PREFIX_NONE, 16, 1, (buf), (buf_len), false)
#else
#define RTSX_DUMP(buf, buf_len)
#endif
RTSX_READ_REG(chip, XD_ECC_BIT1, &ecc_bit);
RTSX_READ_REG(chip, XD_ECC_BYTE1, &ecc_byte);
- RTSX_DEBUGP("ECC_BIT1 = 0x%x, ECC_BYTE1 = 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "ECC_BIT1 = 0x%x, ECC_BYTE1 = 0x%x\n",
ecc_bit, ecc_byte);
if (ecc_byte < buf_len) {
- RTSX_DEBUGP("Before correct: 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "Before correct: 0x%x\n",
buf[ecc_byte]);
buf[ecc_byte] ^= (1 << ecc_bit);
- RTSX_DEBUGP("After correct: 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "After correct: 0x%x\n",
buf[ecc_byte]);
}
}
RTSX_READ_REG(chip, XD_ECC_BIT2, &ecc_bit);
RTSX_READ_REG(chip, XD_ECC_BYTE2, &ecc_byte);
- RTSX_DEBUGP("ECC_BIT2 = 0x%x, ECC_BYTE2 = 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "ECC_BIT2 = 0x%x, ECC_BYTE2 = 0x%x\n",
ecc_bit, ecc_byte);
if (ecc_byte < buf_len) {
- RTSX_DEBUGP("Before correct: 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "Before correct: 0x%x\n",
buf[ecc_byte]);
buf[ecc_byte] ^= (1 << ecc_bit);
- RTSX_DEBUGP("After correct: 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "After correct: 0x%x\n",
buf[ecc_byte]);
}
}
#ifdef SUPPORT_OCP
wait_timeout(50);
if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
- RTSX_DEBUGP("Over current, OCPSTAT is 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
chip->ocp_stat);
TRACE_RET(chip, STATUS_FAIL);
}
ptr = rtsx_get_cmd_data(chip) + 1;
- RTSX_DEBUGP("XD_DAT: 0x%x, XD_CTL: 0x%x\n", ptr[0], ptr[1]);
+ dev_dbg(rtsx_dev(chip), "XD_DAT: 0x%x, XD_CTL: 0x%x\n",
+ ptr[0], ptr[1]);
if (((ptr[0] & READY_FLAG) != READY_STATE) ||
!(ptr[1] & XD_RDY))
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
- RTSX_DEBUGP("READ_ID: 0x%x 0x%x 0x%x 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "READ_ID: 0x%x 0x%x 0x%x 0x%x\n",
id_buf[0], id_buf[1], id_buf[2], id_buf[3]);
xd_card->device_code = id_buf[1];
retval = xd_read_id(chip, READ_xD_ID, id_buf, 4);
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
- RTSX_DEBUGP("READ_xD_ID: 0x%x 0x%x 0x%x 0x%x\n",
- id_buf[0], id_buf[1], id_buf[2], id_buf[3]);
+ dev_dbg(rtsx_dev(chip), "READ_xD_ID: 0x%x 0x%x 0x%x 0x%x\n",
+ id_buf[0], id_buf[1], id_buf[2], id_buf[3]);
if (id_buf[2] != XD_ID_CODE)
TRACE_RET(chip, STATUS_FAIL);
break;
}
- RTSX_DEBUGP("CIS block: 0x%x\n", xd_card->cis_block);
+ dev_dbg(rtsx_dev(chip), "CIS block: 0x%x\n", xd_card->cis_block);
if (xd_card->cis_block == 0xFFFF)
TRACE_RET(chip, STATUS_FAIL);
struct xd_info *xd_card = &(chip->xd_card);
int size, i;
- RTSX_DEBUGP("xd_init_l2p_tbl: zone_cnt = %d\n", xd_card->zone_cnt);
+ dev_dbg(rtsx_dev(chip), "xd_init_l2p_tbl: zone_cnt = %d\n",
+ xd_card->zone_cnt);
if (xd_card->zone_cnt < 1)
TRACE_RET(chip, STATUS_FAIL);
size = xd_card->zone_cnt * sizeof(struct zone_entry);
- RTSX_DEBUGP("Buffer size for l2p table is %d\n", size);
+ dev_dbg(rtsx_dev(chip), "Buffer size for l2p table is %d\n", size);
xd_card->zone = vmalloc(size);
if (!xd_card->zone)
static inline void free_zone(struct zone_entry *zone)
{
- RTSX_DEBUGP("free_zone\n");
-
if (!zone)
return;
zone_no = (int)phy_blk >> 10;
if (zone_no >= xd_card->zone_cnt) {
- RTSX_DEBUGP("Set unused block to invalid zone (zone_no = %d, zone_cnt = %d)\n",
+ dev_dbg(rtsx_dev(chip), "Set unused block to invalid zone (zone_no = %d, zone_cnt = %d)\n",
zone_no, xd_card->zone_cnt);
return;
}
if ((zone->set_index >= XD_FREE_TABLE_CNT)
|| (zone->set_index < 0)) {
free_zone(zone);
- RTSX_DEBUGP("Set unused block fail, invalid set_index\n");
+ dev_dbg(rtsx_dev(chip), "Set unused block fail, invalid set_index\n");
return;
}
- RTSX_DEBUGP("Set unused block to index %d\n", zone->set_index);
+ dev_dbg(rtsx_dev(chip), "Set unused block to index %d\n",
+ zone->set_index);
zone->free_table[zone->set_index++] = (u16) (phy_blk & 0x3ff);
if (zone->set_index >= XD_FREE_TABLE_CNT)
u32 phy_blk;
if (zone_no >= xd_card->zone_cnt) {
- RTSX_DEBUGP("Get unused block from invalid zone (zone_no = %d, zone_cnt = %d)\n",
+ dev_dbg(rtsx_dev(chip), "Get unused block from invalid zone (zone_no = %d, zone_cnt = %d)\n",
zone_no, xd_card->zone_cnt);
return BLK_NOT_FOUND;
}
if ((zone->unused_blk_cnt == 0) ||
(zone->set_index == zone->get_index)) {
free_zone(zone);
- RTSX_DEBUGP("Get unused block fail, no unused block available\n");
+ dev_dbg(rtsx_dev(chip), "Get unused block fail, no unused block available\n");
return BLK_NOT_FOUND;
}
if ((zone->get_index >= XD_FREE_TABLE_CNT) || (zone->get_index < 0)) {
free_zone(zone);
- RTSX_DEBUGP("Get unused block fail, invalid get_index\n");
+ dev_dbg(rtsx_dev(chip), "Get unused block fail, invalid get_index\n");
return BLK_NOT_FOUND;
}
- RTSX_DEBUGP("Get unused block from index %d\n", zone->get_index);
+ dev_dbg(rtsx_dev(chip), "Get unused block from index %d\n",
+ zone->get_index);
phy_blk = zone->free_table[zone->get_index];
zone->free_table[zone->get_index++] = 0xFFFF;
#ifdef XD_DELAY_WRITE
retval = xd_delay_write(chip);
if (retval != STATUS_SUCCESS) {
- RTSX_DEBUGP("In xd_get_l2p_tbl, delay write fail!\n");
+ dev_dbg(rtsx_dev(chip), "In xd_get_l2p_tbl, delay write fail!\n");
return BLK_NOT_FOUND;
}
#endif
if (zone->unused_blk_cnt <= 0) {
- RTSX_DEBUGP("No unused block!\n");
+ dev_dbg(rtsx_dev(chip), "No unused block!\n");
return BLK_NOT_FOUND;
}
for (i = 0; i < zone->unused_blk_cnt; i++) {
phy_blk = xd_get_unused_block(chip, zone_no);
if (phy_blk == BLK_NOT_FOUND) {
- RTSX_DEBUGP("No unused block available!\n");
+ dev_dbg(rtsx_dev(chip), "No unused block available!\n");
return BLK_NOT_FOUND;
}
break;
}
if (i >= zone->unused_blk_cnt) {
- RTSX_DEBUGP("No good unused block available!\n");
+ dev_dbg(rtsx_dev(chip), "No good unused block available!\n");
return BLK_NOT_FOUND;
}
u32 page_addr;
u8 reg = 0;
- RTSX_DEBUGP("mark block 0x%x as bad block\n", phy_blk);
+ dev_dbg(rtsx_dev(chip), "mark block 0x%x as bad block\n", phy_blk);
if (phy_blk == BLK_NOT_FOUND)
TRACE_RET(chip, STATUS_FAIL);
u32 page_addr;
u8 reg = 0;
- RTSX_DEBUGP("Init block 0x%x\n", phy_blk);
+ dev_dbg(rtsx_dev(chip), "Init block 0x%x\n", phy_blk);
if (start_page > end_page)
TRACE_RET(chip, STATUS_FAIL);
u8 i, reg = 0;
int retval;
- RTSX_DEBUGP("Copy page from block 0x%x to block 0x%x\n",
+ dev_dbg(rtsx_dev(chip), "Copy page from block 0x%x to block 0x%x\n",
old_blk, new_blk);
if (start_page > end_page)
XD_BLOCK_STATUS, 0xFF,
XD_GBLK);
XD_SET_BAD_OLDBLK(xd_card);
- RTSX_DEBUGP("old block 0x%x ecc error\n", old_blk);
+ dev_dbg(rtsx_dev(chip), "old block 0x%x ecc error\n",
+ old_blk);
}
} else {
xd_set_err_code(chip, XD_TO_ERROR);
u16 cur_lst_page_logoff, ent_lst_page_logoff;
u8 redunt[11];
- RTSX_DEBUGP("xd_build_l2p_tbl: %d\n", zone_no);
+ dev_dbg(rtsx_dev(chip), "xd_build_l2p_tbl: %d\n", zone_no);
if (xd_card->zone == NULL) {
retval = xd_init_l2p_tbl(chip);
}
if (xd_card->zone[zone_no].build_flag) {
- RTSX_DEBUGP("l2p table of zone %d has been built\n", zone_no);
+ dev_dbg(rtsx_dev(chip), "l2p table of zone %d has been built\n",
+ zone_no);
return STATUS_SUCCESS;
}
max_logoff = 999;
}
- RTSX_DEBUGP("start block 0x%x, end block 0x%x\n", start, end);
+ dev_dbg(rtsx_dev(chip), "start block 0x%x, end block 0x%x\n",
+ start, end);
zone->set_index = zone->get_index = 0;
zone->unused_blk_cnt = 0;
continue;
if (redunt[BLOCK_STATUS] != 0xFF) {
- RTSX_DEBUGP("bad block\n");
+ dev_dbg(rtsx_dev(chip), "bad block\n");
continue;
}
if (xd_check_data_blank(redunt)) {
- RTSX_DEBUGP("blank block\n");
+ dev_dbg(rtsx_dev(chip), "blank block\n");
xd_set_unused_block(chip, i);
continue;
}
i++;
}
- RTSX_DEBUGP("Block count %d, invalid L2P entry %d\n", end, i);
- RTSX_DEBUGP("Total unused block: %d\n", zone->unused_blk_cnt);
+ dev_dbg(rtsx_dev(chip), "Block count %d, invalid L2P entry %d\n",
+ end, i);
+ dev_dbg(rtsx_dev(chip), "Total unused block: %d\n",
+ zone->unused_blk_cnt);
if ((zone->unused_blk_cnt - i) < 1)
chip->card_wp |= XD_CARD;
int retval, zone_no;
u16 log_off;
- RTSX_DEBUGP("xd_finish_write, old_blk = 0x%x, new_blk = 0x%x, log_blk = 0x%x\n",
- old_blk, new_blk, log_blk);
+ dev_dbg(rtsx_dev(chip), "xd_finish_write, old_blk = 0x%x, new_blk = 0x%x, log_blk = 0x%x\n",
+ old_blk, new_blk, log_blk);
if (page_off > xd_card->page_off)
TRACE_RET(chip, STATUS_FAIL);
{
int retval;
- RTSX_DEBUGP("%s, old_blk = 0x%x, new_blk = 0x%x, log_blk = 0x%x, page_off = %d\n",
+ dev_dbg(rtsx_dev(chip), "%s, old_blk = 0x%x, new_blk = 0x%x, log_blk = 0x%x, page_off = %d\n",
__func__, old_blk, new_blk, log_blk, (int)page_off);
if (page_off) {
u16 log_off;
u8 page_cnt, reg_val;
- RTSX_DEBUGP("%s, old_blk = 0x%x, new_blk = 0x%x, log_blk = 0x%x\n",
- __func__, old_blk, new_blk, log_blk);
+ dev_dbg(rtsx_dev(chip), "%s, old_blk = 0x%x, new_blk = 0x%x, log_blk = 0x%x\n",
+ __func__, old_blk, new_blk, log_blk);
if (start_page > end_page)
TRACE_RET(chip, STATUS_FAIL);
int retval;
if (delay_write->delay_write_flag) {
- RTSX_DEBUGP("xd_delay_write\n");
+ dev_dbg(rtsx_dev(chip), "xd_delay_write\n");
retval = xd_switch_clock(chip);
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
xd_card->cleanup_counter = 0;
- RTSX_DEBUGP("xd_rw: scsi_sg_count = %d\n", scsi_sg_count(srb));
+ dev_dbg(rtsx_dev(chip), "xd_rw: scsi_sg_count = %d\n",
+ scsi_sg_count(srb));
ptr = (u8 *)scsi_sglist(srb);
}
}
- RTSX_DEBUGP("old_blk = 0x%x\n", old_blk);
+ dev_dbg(rtsx_dev(chip), "old_blk = 0x%x\n", old_blk);
while (total_sec_cnt) {
if (detect_card_cd(chip, XD_CARD) != STATUS_SUCCESS) {
struct xd_info *xd_card = &(chip->xd_card);
if (xd_card->delay_write.delay_write_flag) {
- RTSX_DEBUGP("xD: delay write\n");
+ dev_dbg(rtsx_dev(chip), "xD: delay write\n");
xd_delay_write(chip);
xd_card->cleanup_counter = 0;
}
struct xd_info *xd_card = &(chip->xd_card);
int retval;
- RTSX_DEBUGP("release_xd_card\n");
-
chip->card_ready &= ~XD_CARD;
chip->card_fail &= ~XD_CARD;
chip->card_wp &= ~XD_CARD;
projects / openwrt / staging / blogic.git / commitdiff