void bl1_plat_set_ep_info(unsigned int image_id,
entry_point_info_t *ep_info)
{
- unsigned int data = 0;
+ uint64_t data = 0;
if (image_id == BL2_IMAGE_ID)
- return;
+ panic();
inv_dcache_range(NS_BL1U_BASE, NS_BL1U_SIZE);
__asm__ volatile ("mrs %0, cpacr_el1" : "=r"(data));
do {
# Enable version2 of image loading
LOAD_IMAGE_V2 := 1
+ # Non-TF Boot ROM
+ BL2_AT_EL3 := 1
+
# On Hikey, the TSP can execute from TZC secure area in DRAM (default)
# or SRAM.
-HIKEY_TSP_RAM_LOCATION := dram
+HIKEY_TSP_RAM_LOCATION ?= dram
ifeq (${HIKEY_TSP_RAM_LOCATION}, dram)
HIKEY_TSP_RAM_LOCATION_ID = HIKEY_DRAM_ID
else ifeq (${HIKEY_TSP_RAM_LOCATION}, sram)
# Enable version2 of image loading
LOAD_IMAGE_V2 := 1
+ # Non-TF Boot ROM
+ BL2_AT_EL3 := 1
+
# On Hikey960, the TSP can execute from TZC secure area in DRAM.
-HIKEY960_TSP_RAM_LOCATION := dram
+HIKEY960_TSP_RAM_LOCATION ?= dram
ifeq (${HIKEY960_TSP_RAM_LOCATION}, dram)
HIKEY960_TSP_RAM_LOCATION_ID = HIKEY960_DRAM_ID
else ifeq (${HIKEY960_TSP_RAM_LOCATION}, sram)