net: pcnet: Fix init on big endian 64 bit
authorPaul Burton <paul.burton@imgtec.com>
Thu, 26 May 2016 16:32:29 +0000 (17:32 +0100)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tue, 31 May 2016 07:38:11 +0000 (09:38 +0200)
If dev->iobase is 64 bits wide then writing the value of the BAR into a
pointer to iobase will not work on big endian systems, where the BAR
value will incorrectly get written to the upper 32 bits of the 64 bit
variable. Fix this by reading the BAR into a u32, matching the type
expected by pci_read_config_dword.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
drivers/net/pcnet.c

index d1fd4e4e24b1b0eb003024037e19e27b8ad931c8..1da9996986912b879d23cdd1ba5088a4fb0b486b 100644 (file)
@@ -155,6 +155,7 @@ int pcnet_initialize(bd_t *bis)
        struct eth_device *dev;
        u16 command, status;
        int dev_nr = 0;
+       u32 bar;
 
        PCNET_DEBUG1("\npcnet_initialize...\n");
 
@@ -182,9 +183,8 @@ int pcnet_initialize(bd_t *bis)
                /*
                 * Setup the PCI device.
                 */
-               pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0,
-                                     (unsigned int *)&dev->iobase);
-               dev->iobase = pci_io_to_phys(devbusfn, dev->iobase);
+               pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &bar);
+               dev->iobase = pci_io_to_phys(devbusfn, bar);
                dev->iobase &= ~0xf;
 
                PCNET_DEBUG1("%s: devbusfn=0x%x iobase=0x%lx: ",