MIPS: xilfpga: Add DT node for AXI emaclite
authorZubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Tue, 22 Nov 2016 17:52:42 +0000 (17:52 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 3 Jan 2017 15:34:40 +0000 (16:34 +0100)
The xilfpga platform has a Xilinx AXI emaclite block.

Add the DT node to use it.

Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14596/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/boot/dts/xilfpga/nexys4ddr.dts

index f5ebab85d42eef051ce07dbe5d2067c67b580c9b..09a62f2e2f8ffc8335e80943ba3c13444b626331 100644 (file)
                xlnx,tri-default = <0xffffffff>;
        } ;
 
+       axi_ethernetlite: ethernet@10e00000 {
+               compatible = "xlnx,xps-ethernetlite-3.00.a";
+               device_type = "network";
+               interrupt-parent = <&axi_intc>;
+               interrupts = <1>;
+               phy-handle = <&phy0>;
+               reg = <0x10e00000 0x10000>;
+               xlnx,duplex = <0x1>;
+               xlnx,include-global-buffers = <0x1>;
+               xlnx,include-internal-loopback = <0x0>;
+               xlnx,include-mdio = <0x1>;
+               xlnx,instance = "axi_ethernetlite_inst";
+               xlnx,rx-ping-pong = <0x1>;
+               xlnx,s-axi-id-width = <0x1>;
+               xlnx,tx-ping-pong = <0x1>;
+               xlnx,use-internal = <0x0>;
+               mdio {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       phy0: phy@1 {
+                               device_type = "ethernet-phy";
+                               reg = <1>;
+                       };
+               };
+       };
+
        axi_uart16550: serial@10400000 {
                compatible = "ns16550a";
                reg = <0x10400000 0x10000>;