--- /dev/null
+#
+# Copyright (C) 2024 Bootlin
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=murata-nvram
+PKG_RELEASE:=1
+
+PKG_SOURCE_PROTO:=git
+PKG_SOURCE_DATE:=2024-09-28
+PKG_SOURCE_URL:=https://github.com/murata-wireless/cyw-fmac-nvram.git
+PKG_MIRROR_HASH:=e2fc6f1f9898edfd67f5495e615882700f03b42a75efa2e3f4e2d524aed0efb8
+PKG_SOURCE_VERSION:=255819aab07572d87576a13329ef9d4c654167aa
+
+PKG_MAINTAINER:=Thomas Richard <thomas.richard@bootlin.com>
+PKG_LICENSE_FILES:=LICENCE.cypress
+
+include $(INCLUDE_DIR)/package.mk
+
+define Package/murata-nvram-default
+ SECTION:=firmware
+ CATEGORY:=Firmware
+ URL:=https://community.murata.com/
+endef
+
+define Build/Compile
+endef
+
+define Package/murata-nvram-43430-sdio
+ $(Package/murata-nvram-default)
+ TITLE:=BCM43430 SDIO NVRAM
+ CONFLICTS:=brcmfmac-nvram-43430-sdio
+endef
+
+define Package/murata-nvram-43430-sdio/install
+ $(INSTALL_DIR) $(1)/lib/firmware/brcm
+ $(INSTALL_DATA) ./files/cyfmac43430-sdio.1DX.stm32.txt \
+ $(1)/lib/firmware/brcm/
+ $(LN) \
+ cyfmac43430-sdio.1DX.stm32.txt \
+ $(1)/lib/firmware/brcm/brcmfmac43430-sdio.st,stm32mp135f-dk.txt
+endef
+
+$(eval $(call BuildPackage,murata-nvram-43430-sdio))
--- /dev/null
+# This NVRAM file is based on cyfmac43430-sdio.1DX.txt, except that the muxenab
+# parameter was unset to enable IB IRQ (OOB IRQ is not stable on STM32
+# platforms).
+# 2.4 GHz, 20 MHz BW mode
+manfid=0x2d0
+prodid=0x0726
+vendid=0x14e4
+devid=0x43e2
+boardtype=0x0726
+boardrev=0x1202
+boardnum=22
+macaddr=00:90:4c:c5:12:38
+sromrev=11
+boardflags=0x00404201
+boardflags3=0x08000000
+xtalfreq=37400
+nocrc=1
+ag0=0
+aa2g=1
+ccode=ALL
+#pa0itssit=0x20
+extpagain2g=0
+pa2ga0=-145,6667,-751
+AvVmid_c0=0x0,0xc8
+cckpwroffset0=2
+maxp2ga0=74
+#txpwrbckof=6
+cckbw202gpo=0
+legofdmbw202gpo=0x88888888
+mcsbw202gpo=0xaaaaaaaa
+propbw202gpo=0xdd
+ofdmdigfilttype=18
+ofdmdigfilttypebe=18
+papdmode=1
+papdvalidtest=1
+pacalidx2g=48
+papdepsoffset=-22
+papdendidx=58
+il0macaddr=00:90:4c:c5:12:38
+wl0id=0x431b
+# muxenab defined to enable OOB IRQ. Level sensitive interrupt via WL_HOST_WAKE line.
+# muxenab=0x10
+#BT COEX deferral limit setting
+#btc_params 8 45000
+#btc_params 10 20000
+#spurconfig=0x3
+# End of NVRAM - do not remove this line #