mediatek: add I2C for MT7981 SoC

Add patch to support I2C on the MT7981 SoC.
This change will also be submitted to upstream Linux soon.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>

diff --git a/target/linux/mediatek/patches-5.15/810-i2c-mediatek-add-support-for-MT7981-SoC.patch b/target/linux/mediatek/patches-5.15/810-i2c-mediatek-add-support-for-MT7981-SoC.patch
new file mode 100644 (file)
index 0000000..f9ad79c
--- /dev/null
+++ b/target/linux/mediatek/patches-5.15/810-i2c-mediatek-add-support-for-MT7981-SoC.patch
@@ -0,0 +1,74 @@
+From bd4f7dae6a1f2fd65bb2112783c92ffe0839bc77 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Tue, 28 Feb 2023 23:53:56 +0000
+Subject: [PATCH] i2c: mediatek: add support for MT7981 SoC
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/i2c/busses/i2c-mt65xx.c | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+--- a/drivers/i2c/busses/i2c-mt65xx.c
++++ b/drivers/i2c/busses/i2c-mt65xx.c
+@@ -202,6 +202,34 @@ static const u16 mt_i2c_regs_v2[] = {
+       [OFFSET_DCM_EN] = 0xf88,
+ };
+ 
++static const u16 mt_i2c_regs_v3[] = {
++      [OFFSET_DATA_PORT] = 0x0,
++      [OFFSET_INTR_MASK] = 0x8,
++      [OFFSET_INTR_STAT] = 0xc,
++      [OFFSET_CONTROL] = 0x10,
++      [OFFSET_TRANSFER_LEN] = 0x14,
++      [OFFSET_TRANSAC_LEN] = 0x18,
++      [OFFSET_DELAY_LEN] = 0x1c,
++      [OFFSET_TIMING] = 0x20,
++      [OFFSET_START] = 0x24,
++      [OFFSET_EXT_CONF] = 0x28,
++      [OFFSET_LTIMING] = 0x2c,
++      [OFFSET_HS] = 0x30,
++      [OFFSET_IO_CONFIG] = 0x34,
++      [OFFSET_FIFO_ADDR_CLR] = 0x38,
++      [OFFSET_SDA_TIMING] = 0x3c,
++      [OFFSET_TRANSFER_LEN_AUX] = 0x44,
++      [OFFSET_CLOCK_DIV] = 0x48,
++      [OFFSET_SOFTRESET] = 0x50,
++      [OFFSET_SCL_MIS_COMP_POINT] = 0x90,
++      [OFFSET_SLAVE_ADDR] = 0x94,
++      [OFFSET_DEBUGSTAT] = 0xe4,
++      [OFFSET_DEBUGCTRL] = 0xe8,
++      [OFFSET_FIFO_STAT] = 0xf4,
++      [OFFSET_FIFO_THRESH] = 0xf8,
++      [OFFSET_DCM_EN] = 0xf88,
++};
++
+ struct mtk_i2c_compatible {
+       const struct i2c_adapter_quirks *quirks;
+       const u16 *regs;
+@@ -365,6 +393,18 @@ static const struct mtk_i2c_compatible m
+       .max_dma_support = 32,
+ };
+ 
++static const struct mtk_i2c_compatible mt7981_compat = {
++      .regs = mt_i2c_regs_v3,
++      .pmic_i2c = 0,
++      .dcm = 0,
++      .auto_restart = 1,
++      .aux_len_reg = 1,
++      .timing_adjust = 1,
++      .dma_sync = 1,
++      .ltiming_adjust = 1,
++      .max_dma_support = 33
++};
++
+ static const struct mtk_i2c_compatible mt7986_compat = {
+       .quirks = &mt7622_i2c_quirks,
+       .regs = mt_i2c_regs_v1,
+@@ -424,6 +464,7 @@ static const struct of_device_id mtk_i2c
+       { .compatible = "mediatek,mt6577-i2c", .data = &mt6577_compat },
+       { .compatible = "mediatek,mt6589-i2c", .data = &mt6589_compat },
+       { .compatible = "mediatek,mt7622-i2c", .data = &mt7622_compat },
++      { .compatible = "mediatek,mt7981-i2c", .data = &mt7981_compat },
+       { .compatible = "mediatek,mt7986-i2c", .data = &mt7986_compat },
+       { .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat },
+       { .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat },