1. Board Switches and Jumpers
- SW3 is used to set CFG_RESET_SOURCE.
+ S3 is used to set CFG_RESET_SOURCE.
To boot the image at 0xFE000000 in NOR flash, use these DIP
- switche settings for SW3 SW4:
+ switch settings for S3 S4:
+------+ +------+
| | | **** |
S3 is used to set CFG_RESET_SOURCE.
To boot the image at 0xFE000000 in NOR flash, use these DIP
- switche settings for S3 S4:
+ switch settings for S3 S4:
+------+ +------+
| | | **** |
0xe010_0000 0xe02f_ffff Empty 2M
0xe030_0000 0xe03f_ffff PCI IO 1M
0xe040_0000 0xe05f_ffff Empty 2M
- 0xe060_0000 0xe060_8000 NAND Flash 32K
+ 0xe060_0000 0xe060_7fff NAND Flash 32K
0xf400_0000 0xf7ff_ffff Empty 64M
0xf800_0000 0xf800_7fff BCSR on CS1 32K
0xfe00_0000 0xffff_ffff NOR Flash on CS0 32M
-Freescale MPC837xEMDS Board
+Freescale MPC837xE-RDB Board
-----------------------------------------
1. Board Description
=========================== ================= ======= =========
0x0000_0000 0x0fff_ffff DDR 256M 64
0x1000_0000 0x7fff_ffff Empty 1.75G -
- 0x8000_0000 0x9fff_ffff PCI1 memory space 512M 32
- 0xa000_0000 0xbfff_ffff PCI2 memory space 512M 32
- 0xc200_0000 0xc2ff_ffff PCI1 I/O space 16M 32
- 0xc300_0000 0xc3ff_ffff PCI2 I/O space 16M 32
+ 0x8000_0000 0x8fff_ffff PCI MEM prefetch 256M 32
+ 0x9000_0000 0x9fff_ffff PCI MEM non-prefetch 256M 32
+ 0xe030_0000 0xe03f_ffff PCI I/O space 1M 32
0xe000_0000 0xe00f_ffff Int Mem Reg Space 1M -
- 0xe280_0000 0xe47f_ffff NAND Flash 32M 8
+ 0xe060_0000 0xe060_7fff NAND Flash 32K 8
0xfe00_0000 0xfe7f_ffff NOR Flash on CS0 8M 16
CONFIG_MPC83XX MPC83xx family for both MPC8349 and MPC8360
CONFIG_MPC837X MPC837x specific
- CONFIG_MPC837XERDB MPC837XEMDS board specific
+ CONFIG_MPC837XERDB MPC837xE-RDB board specific
4. Compilation