drm/amd/powerplay: use SMU_IND_INDEX/DATA_11 pair
authorRex Zhu <Rex.Zhu@amd.com>
Wed, 20 Sep 2017 08:49:29 +0000 (16:49 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2017 19:14:28 +0000 (15:14 -0400)
in VFPF macros to support virtualization

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/inc/smumgr.h
drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c

index 8bdffaa14b431b75b7fccd5cf6a7d242e94b0d2a..54b151b03aa85113c61b6b0a6ad0fc49a81633a8 100644 (file)
@@ -195,12 +195,12 @@ extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr);
 #define SMUM_WAIT_VFPF_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr,            \
                                port, index, value, mask)               \
        smum_wait_on_indirect_register(hwmgr,                           \
-               mm##port##_INDEX_0, index, value, mask)
+               mm##port##_INDEX_11, index, value, mask)
 
 #define SMUM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr,    \
                                port, index, value, mask)               \
        smum_wait_for_indirect_register_unequal(hwmgr,                  \
-               mm##port##_INDEX_0, index, value, mask)
+               mm##port##_INDEX_11, index, value, mask)
 
 
 #define SMUM_WAIT_VFPF_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \
index c2fc237a136a1f59c29aa6b44cf49de1520e26c9..ccd65819722b26150d0e7ef5add331152a95bbc6 100644 (file)
@@ -2345,7 +2345,7 @@ static int ci_upload_firmware(struct pp_hwmgr *hwmgr)
                pr_info("smc is running, no need to load smc firmware\n");
                return 0;
        }
-       SMUM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, RCU_UC_EVENTS,
+       PHM_WAIT_INDIRECT_FIELD(hwmgr, SMC_IND, RCU_UC_EVENTS,
                        boot_seq_done, 1);
        PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_MISC_CNTL,
                        pre_fetcher_en, 1);