drm/i915/icl: Factor out combo PHY lane power setup helper

Factor out the combo PHY lane power configuration code to a separate
helper; it will be also needed by the next patch adding the same
configuration for DDI ports.

Add support for DDI ports and lane reversal as preparation for the next
patch.

The PWR_DOWN_LN_1 value is unspecified in the BSpec register description
so remove it.

v2:
- Fix up the wrong assumption that the encodings are the same for DDI
  and DSI ports. (Jani)
v3:
- Use intel_ instead of icl_ prefix. (Jani)
- Add required headers to intel_combo_phy.h after the upstream header
  refactoring.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Madhav Chauhan <madhav.chauhan@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com> (v2)
Link: https://patchwork.freedesktop.org/patch/msgid/20190425185253.3197-1-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index f386c6c8a3b74f40c85f3f4616101fb9457d8fbb..e97c47fca645bd564ecd47f266c3bf86021a0946 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1813,7 +1813,6 @@ enum i915_power_well_id {
 #define  PWR_DOWN_LN_3                 (0x8 << 4)
 #define  PWR_DOWN_LN_2_1_0             (0x7 << 4)
 #define  PWR_DOWN_LN_1_0               (0x3 << 4)
-#define  PWR_DOWN_LN_1                 (0x2 << 4)
 #define  PWR_DOWN_LN_3_1               (0xa << 4)
 #define  PWR_DOWN_LN_3_1_0             (0xb << 4)
 #define  PWR_DOWN_LN_MASK              (0xf << 4)

diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
index c6ecc008760896e6bc2021c594efd10062904b03..6834faf776111c891aa27d4dc704c08a42422042 100644 (file)
--- a/drivers/gpu/drm/i915/icl_dsi.c
+++ b/drivers/gpu/drm/i915/icl_dsi.c
@@ -29,6 +29,7 @@
 #include <drm/drm_mipi_dsi.h>
 
 #include "intel_atomic.h"
+#include "intel_combo_phy.h"
 #include "intel_connector.h"
 #include "intel_ddi.h"
 #include "intel_dsi.h"
@@ -364,30 +365,10 @@ static void gen11_dsi_power_up_lanes(struct intel_encoder *encoder)
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
        enum port port;
-       u32 tmp;
-       u32 lane_mask;
-
-       switch (intel_dsi->lane_count) {
-       case 1:
-               lane_mask = PWR_DOWN_LN_3_1_0;
-               break;
-       case 2:
-               lane_mask = PWR_DOWN_LN_3_1;
-               break;
-       case 3:
-               lane_mask = PWR_DOWN_LN_3;
-               break;
-       case 4:
-       default:
-               lane_mask = PWR_UP_ALL_LANES;
-               break;
-       }
 
-       for_each_dsi_port(port, intel_dsi->ports) {
-               tmp = I915_READ(ICL_PORT_CL_DW10(port));
-               tmp &= ~PWR_DOWN_LN_MASK;
-               I915_WRITE(ICL_PORT_CL_DW10(port), tmp | lane_mask);
-       }
+       for_each_dsi_port(port, intel_dsi->ports)
+               intel_combo_phy_power_up_lanes(dev_priv, port, true,
+                                              intel_dsi->lane_count, false);
 }
 
 static void gen11_dsi_config_phy_lanes_sequence(struct intel_encoder *encoder)

diff --git a/drivers/gpu/drm/i915/intel_combo_phy.c b/drivers/gpu/drm/i915/intel_combo_phy.c
index 5c7eb6cf3ccefae6798339559c71800a8d8c5842..f1b883fbce95097d68ce8e4fbd288372dc23376e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_combo_phy.c
+++ b/drivers/gpu/drm/i915/intel_combo_phy.c
@@ -204,6 +204,58 @@ static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv,
        return ret;
 }
 
+void intel_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv,
+                                   enum port port, bool is_dsi,
+                                   int lane_count, bool lane_reversal)
+{
+       u8 lane_mask;
+       u32 val;
+
+       if (is_dsi) {
+               WARN_ON(lane_reversal);
+
+               switch (lane_count) {
+               case 1:
+                       lane_mask = PWR_DOWN_LN_3_1_0;
+                       break;
+               case 2:
+                       lane_mask = PWR_DOWN_LN_3_1;
+                       break;
+               case 3:
+                       lane_mask = PWR_DOWN_LN_3;
+                       break;
+               default:
+                       MISSING_CASE(lane_count);
+                       /* fall-through */
+               case 4:
+                       lane_mask = PWR_UP_ALL_LANES;
+                       break;
+               }
+       } else {
+               switch (lane_count) {
+               case 1:
+                       lane_mask = lane_reversal ? PWR_DOWN_LN_2_1_0 :
+                                                   PWR_DOWN_LN_3_2_1;
+                       break;
+               case 2:
+                       lane_mask = lane_reversal ? PWR_DOWN_LN_1_0 :
+                                                   PWR_DOWN_LN_3_2;
+                       break;
+               default:
+                       MISSING_CASE(lane_count);
+                       /* fall-through */
+               case 4:
+                       lane_mask = PWR_UP_ALL_LANES;
+                       break;
+               }
+       }
+
+       val = I915_READ(ICL_PORT_CL_DW10(port));
+       val &= ~PWR_DOWN_LN_MASK;
+       val |= lane_mask << PWR_DOWN_LN_SHIFT;
+       I915_WRITE(ICL_PORT_CL_DW10(port), val);
+}
+
 void icl_combo_phys_init(struct drm_i915_private *dev_priv)
 {
        enum port port;

diff --git a/drivers/gpu/drm/i915/intel_combo_phy.h b/drivers/gpu/drm/i915/intel_combo_phy.h
index f7f1e5ab34a9add05d42b2bda2ff7b9c8d5b8222..749b644ddcb9ade8a4290eb39d7eb4a5edf86ed5 100644 (file)
--- a/drivers/gpu/drm/i915/intel_combo_phy.h
+++ b/drivers/gpu/drm/i915/intel_combo_phy.h
@@ -6,11 +6,17 @@
 #ifndef __INTEL_COMBO_PHY_H__
 #define __INTEL_COMBO_PHY_H__
 
+#include <linux/types.h>
+#include <drm/i915_drm.h>
+
 struct drm_i915_private;
 
 void icl_combo_phys_init(struct drm_i915_private *dev_priv);
 void icl_combo_phys_uninit(struct drm_i915_private *dev_priv);
 void cnl_combo_phys_init(struct drm_i915_private *dev_priv);
 void cnl_combo_phys_uninit(struct drm_i915_private *dev_priv);
+void intel_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv,
+                                   enum port port, bool is_dsi,
+                                   int lane_count, bool lane_reversal);
 
 #endif /* __INTEL_COMBO_PHY_H__ */