arm: zynq: Add board support for cc108

cc108 board is wiring uart via PL which is good platform for SPL fpga
support.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ecbc9640530d8719fa4d330884c17155d5ecc813..e82b99c20510e484b0dfaf4398cb3e630b9957ca 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -125,6 +125,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \
        uniphier-sld8-ref.dtb
 
 dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \
+       zynq-cc108.dtb \
        zynq-zc706.dtb \
        zynq-zed.dtb \
        zynq-zybo.dtb \

diff --git a/arch/arm/dts/zynq-cc108.dts b/arch/arm/dts/zynq-cc108.dts
new file mode 100644 (file)
index 0000000..a55e82b
--- /dev/null
+++ b/arch/arm/dts/zynq-cc108.dts
@@ -0,0 +1,116 @@
+/*
+ * Xilinx CC108 board DTS
+ *
+ * (C) Copyright 2007-2013 Xilinx, Inc.
+ * (C) Copyright 2007-2013 Michal Simek
+ * (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
+ *
+ * Michal SIMEK <monstr@monstr.eu>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+/dts-v1/;
+/include/ "zynq-7000.dtsi"
+
+/ {
+       compatible = "xlnx,zynq-cc108", "xlnx,zynq-7000";
+       model = "Xilinx Zynq";
+
+       aliases {
+               ethernet0 = &gem0;
+               serial0 = &uart0;
+               spi0 = &qspi;
+       };
+
+       chosen {
+               bootargs = "";
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x0 0x20000000>;
+       };
+
+       usb_phy0: phy0 {
+               compatible = "usb-nop-xceiv";
+               #phy-cells = <0>;
+       };
+
+       usb_phy1: phy1 {
+               compatible = "usb-nop-xceiv";
+               #phy-cells = <0>;
+       };
+};
+
+&gem0 {
+       status = "okay";
+       phy-mode = "rgmii-id";
+       phy-handle = <&ethernet_phy>;
+
+       ethernet_phy: ethernet-phy@1 {
+               reg = <1>;
+               device_type = "ethernet-phy";
+       };
+};
+
+&qspi {
+       status = "okay";
+       is-dual = <0>;
+       num-cs = <1>;
+       flash@0 { /* 16 MB */
+               compatible = "n25q128a11";
+               reg = <0x0>;
+               spi-max-frequency = <50000000>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               partition@0 {
+                       label = "qspi-fsbl-uboot-bs";
+                       reg = <0x0 0x400000>; /* 4MB */
+               };
+               partition@0x400000 {
+                       label = "qspi-linux";
+                       reg = <0x400000 0x400000>; /* 4MB */
+               };
+               partition@0x800000 {
+                       label = "qspi-rootfs";
+                       reg = <0x800000 0x400000>; /* 4MB */
+               };
+               partition@0xc00000 {
+                       label = "qspi-devicetree";
+                       reg = <0xc00000 0x100000>; /* 1MB */
+               };
+               partition@0xd00000 {
+                       label = "qspi-scratch";
+                       reg = <0xd00000 0x200000>; /* 2MB */
+               };
+               partition@0xf00000 {
+                       label = "qspi-uboot-env";
+                       reg = <0xf00000 0x100000>; /* 1MB */
+               };
+       };
+};
+
+&sdhci1 {
+       status = "okay";
+       broken-cd ;
+       wp-inverted ;
+};
+
+&uart0 {
+       status = "okay";
+};
+
+&usb0 {
+       status = "okay";
+       dr_mode = "host";
+       usb-phy = <&usb_phy0>;
+};
+
+&usb1 {
+       status = "okay";
+       dr_mode = "host";
+       usb-phy = <&usb_phy1>;
+};

diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig
new file mode 100644 (file)
index 0000000..9d7ba63
--- /dev/null
+++ b/configs/zynq_cc108_defconfig
@@ -0,0 +1,54 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ZYNQ=y
+CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_DEFAULT_DEVICE_TREE="zynq-cc108"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="Zynq> "
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_ZYNQ_GEM=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_BASE=0xe0000000
+CONFIG_DEBUG_UART_CLOCK=50000000
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_ZYNQ_QSPI=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y