#define ST_ACCEL_4_IG1_EN_MASK 0x08
#define ST_ACCEL_4_MULTIREAD_BIT true
+/* CUSTOM VALUES FOR SENSOR 5 */
+#define ST_ACCEL_5_WAI_EXP 0x3b
+#define ST_ACCEL_5_ODR_ADDR 0x20
+#define ST_ACCEL_5_ODR_MASK 0x80
+#define ST_ACCEL_5_ODR_AVL_100HZ_VAL 0x00
+#define ST_ACCEL_5_ODR_AVL_400HZ_VAL 0x01
+#define ST_ACCEL_5_PW_ADDR 0x20
+#define ST_ACCEL_5_PW_MASK 0x40
+#define ST_ACCEL_5_FS_ADDR 0x20
+#define ST_ACCEL_5_FS_MASK 0x20
+#define ST_ACCEL_5_FS_AVL_2_VAL 0X00
+#define ST_ACCEL_5_FS_AVL_8_VAL 0X01
+/* TODO: check these resulting gain settings, these are not in the datsheet */
+#define ST_ACCEL_5_FS_AVL_2_GAIN IIO_G_TO_M_S_2(18000)
+#define ST_ACCEL_5_FS_AVL_8_GAIN IIO_G_TO_M_S_2(72000)
+#define ST_ACCEL_5_DRDY_IRQ_ADDR 0x22
+#define ST_ACCEL_5_DRDY_IRQ_INT1_MASK 0x04
+#define ST_ACCEL_5_DRDY_IRQ_INT2_MASK 0x20
+#define ST_ACCEL_5_IG1_EN_ADDR 0x21
+#define ST_ACCEL_5_IG1_EN_MASK 0x08
+#define ST_ACCEL_5_MULTIREAD_BIT false
+
static const struct iio_chan_spec st_accel_8bit_channels[] = {
ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
.multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT,
.bootime = 2, /* guess */
},
+ {
+ .wai = ST_ACCEL_5_WAI_EXP,
+ .sensors_supported = {
+ [0] = LIS331DL_ACCEL_DEV_NAME,
+ },
+ .ch = (struct iio_chan_spec *)st_accel_8bit_channels,
+ .odr = {
+ .addr = ST_ACCEL_5_ODR_ADDR,
+ .mask = ST_ACCEL_5_ODR_MASK,
+ .odr_avl = {
+ { 100, ST_ACCEL_5_ODR_AVL_100HZ_VAL },
+ { 400, ST_ACCEL_5_ODR_AVL_400HZ_VAL, },
+ },
+ },
+ .pw = {
+ .addr = ST_ACCEL_5_PW_ADDR,
+ .mask = ST_ACCEL_5_PW_MASK,
+ .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
+ .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
+ },
+ .enable_axis = {
+ .addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
+ .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
+ },
+ .fs = {
+ .addr = ST_ACCEL_5_FS_ADDR,
+ .mask = ST_ACCEL_5_FS_MASK,
+ .fs_avl = {
+ [0] = {
+ .num = ST_ACCEL_FS_AVL_2G,
+ .value = ST_ACCEL_5_FS_AVL_2_VAL,
+ .gain = ST_ACCEL_5_FS_AVL_2_GAIN,
+ },
+ [1] = {
+ .num = ST_ACCEL_FS_AVL_8G,
+ .value = ST_ACCEL_5_FS_AVL_8_VAL,
+ .gain = ST_ACCEL_5_FS_AVL_8_GAIN,
+ },
+ },
+ },
+ .drdy_irq = {
+ .addr = ST_ACCEL_5_DRDY_IRQ_ADDR,
+ .mask_int1 = ST_ACCEL_5_DRDY_IRQ_INT1_MASK,
+ .mask_int2 = ST_ACCEL_5_DRDY_IRQ_INT2_MASK,
+ },
+ .multi_read_bit = ST_ACCEL_5_MULTIREAD_BIT,
+ .bootime = 2, /* guess */
+ },
};
static int st_accel_read_raw(struct iio_dev *indio_dev,