Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
/* case CPU_20KC:*/
case CPU_24K:
case CPU_25KF:
+ case CPU_34K:
cpu_wait = r4k_wait;
printk(" available.\n");
break;
/* Probe for L2 cache */
c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
break;
+ case PRID_IMP_34K:
+ c->cputype = CPU_34K;
+ c->isa_level = MIPS_CPU_ISA_M32;
+ break;
}
}
[CPU_20KC] = "MIPS 20Kc",
[CPU_24K] = "MIPS 24K",
[CPU_25KF] = "MIPS 25Kf",
+ [CPU_34K] = "MIPS 34K",
[CPU_VR4111] = "NEC VR4111",
[CPU_VR4121] = "NEC VR4121",
[CPU_VR4122] = "NEC VR4122",
case CPU_4KEC:
case CPU_24K:
+ case CPU_34K:
i_ehb(p);
tlbw(p);
break;
#define PRID_IMP_4KEMPR2 0x9100
#define PRID_IMP_4KSD 0x9200
#define PRID_IMP_24K 0x9300
+#define PRID_IMP_34K 0x9500
#define PRID_IMP_24KE 0x9600
#define PRID_IMP_UNKNOWN 0xff00
#define CPU_AU1550 57
#define CPU_24K 58
#define CPU_AU1200 59
-#define CPU_LAST 59
+#define CPU_34K 60
+#define CPU_LAST 60
/*
* ISA Level encodings