igc: Update the MAC reset flow
authorSasha Neftin <sasha.neftin@intel.com>
Wed, 26 Jun 2019 05:53:47 +0000 (08:53 +0300)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Wed, 24 Jul 2019 20:55:09 +0000 (13:55 -0700)
Use Device Reset flow instead of Port Reset flow.
This flow performs a reset of the entire controller device,
resulting in a state nearly approximating the state
following a power-up reset or internal PCIe reset,
except for system PCI configuration.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/igc/igc_base.c
drivers/net/ethernet/intel/igc/igc_defines.h

index 59258d7911060267f88c9cd0a618e606114ba556..46206b3dabfbf1c5e8f0a543d47bc01e9935bc72 100644 (file)
@@ -40,7 +40,7 @@ static s32 igc_reset_hw_base(struct igc_hw *hw)
        ctrl = rd32(IGC_CTRL);
 
        hw_dbg("Issuing a global reset to MAC\n");
-       wr32(IGC_CTRL, ctrl | IGC_CTRL_RST);
+       wr32(IGC_CTRL, ctrl | IGC_CTRL_DEV_RST);
 
        ret_val = igc_get_auto_rd_done(hw);
        if (ret_val) {
index fc0ccfe38a2003d1d0c839797745cf21dca05d0a..11b99acf4abe8391fbaea585464652074eb22b49 100644 (file)
@@ -54,7 +54,7 @@
 #define IGC_ERR_SWFW_SYNC              13
 
 /* Device Control */
-#define IGC_CTRL_RST           0x04000000  /* Global reset */
+#define IGC_CTRL_DEV_RST       0x20000000  /* Device reset */
 
 #define IGC_CTRL_PHY_RST       0x80000000  /* PHY Reset */
 #define IGC_CTRL_SLU           0x00000040  /* Set link up (Force Link) */