Merge tag 'v4.6-rc7' into drm-next
authorDave Airlie <airlied@redhat.com>
Mon, 9 May 2016 03:49:56 +0000 (13:49 +1000)
committerDave Airlie <airlied@redhat.com>
Mon, 9 May 2016 03:49:56 +0000 (13:49 +1000)
Merge this back as we've built up a fair few conflicts, and I have
some newer trees to pull in.

23 files changed:
1  2 
MAINTAINERS
arch/arc/boot/dts/axs10x_mb.dtsi
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
drivers/gpu/drm/amd/amdgpu/tonga_ih.c
drivers/gpu/drm/drm_dp_mst_topology.c
drivers/gpu/drm/drm_edid.c
drivers/gpu/drm/exynos/exynos_drm_fimd.c
drivers/gpu/drm/qxl/qxl_display.c
drivers/gpu/drm/qxl/qxl_drv.h
drivers/gpu/drm/radeon/evergreen.c
drivers/gpu/drm/radeon/radeon_device.c
drivers/gpu/drm/radeon/radeon_ttm.c
drivers/gpu/drm/ttm/ttm_bo.c
drivers/gpu/drm/virtio/virtgpu_display.c

diff --cc MAINTAINERS
index 33181d862e5ac10aa4a12dbbd6e3efe0eb8e14e7,a727d9959ecd1d982e8e35ab20d3ee2eaeed57a5..b81c719020797b605616d8abdea84e951051d86f
@@@ -3975,18 -3879,9 +3975,18 @@@ S:    Maintaine
  F:    drivers/gpu/drm/sti
  F:    Documentation/devicetree/bindings/display/st,stih4xx.txt
  
 +DRM DRIVER FOR TDFX VIDEO CARDS
 +S:    Orphan / Obsolete
 +F:    drivers/gpu/drm/tdfx/
 +
 +DRM DRIVER FOR USB DISPLAYLINK VIDEO ADAPTERS
 +M:    Dave Airlie <airlied@redhat.com>
 +S:    Odd Fixes
 +F:    drivers/gpu/drm/udl/
 +
  DRM DRIVERS FOR VIVANTE GPU IP
  M:    Lucas Stach <l.stach@pengutronix.de>
- R:    Russell King <linux+etnaviv@arm.linux.org.uk>
+ R:    Russell King <linux+etnaviv@armlinux.org.uk>
  R:    Christian Gmeiner <christian.gmeiner@gmail.com>
  L:    dri-devel@lists.freedesktop.org
  S:    Maintained
@@@ -7030,11 -6905,9 +7030,11 @@@ L:    linux-man@vger.kernel.or
  S:    Maintained
  
  MARVELL ARMADA DRM SUPPORT
- M:    Russell King <rmk+kernel@arm.linux.org.uk>
+ M:    Russell King <rmk+kernel@armlinux.org.uk>
  S:    Maintained
  F:    drivers/gpu/drm/armada/
 +F:    include/uapi/drm/armada_drm.h
 +F:    Documentation/devicetree/bindings/display/armada/
  
  MARVELL 88E6352 DSA support
  M:    Guenter Roeck <linux@roeck-us.net>
Simple merge
index 1012bd3f34824276e42aca2151f50bafa142ba40,1bcbade479dc2e384d4abf0481f5571c95699a16..113fd4bf9b642442c46f5558a80e8b758440dfca
@@@ -1639,8 -1591,8 +1639,9 @@@ struct amdgpu_uvd 
        struct amdgpu_bo        *vcpu_bo;
        void                    *cpu_addr;
        uint64_t                gpu_addr;
+       unsigned                fw_version;
        void                    *saved_bo;
 +      unsigned                max_handles;
        atomic_t                handles[AMDGPU_MAX_UVD_HANDLES];
        struct drm_file         *filp[AMDGPU_MAX_UVD_HANDLES];
        struct delayed_work     idle_work;
index db86012deb671c65f410a2754107d45d0d515cec,871018c634e0af896aa5a864bd87ee0653e35396..abda242980ba663b79daf1a72e8553df6eec4e88
@@@ -171,19 -158,11 +171,22 @@@ int amdgpu_uvd_sw_init(struct amdgpu_de
        DRM_INFO("Found UVD firmware Version: %hu.%hu Family ID: %hu\n",
                version_major, version_minor, family_id);
  
 +      /*
 +       * Limit the number of UVD handles depending on microcode major
 +       * and minor versions. The firmware version which has 40 UVD
 +       * instances support is 1.80. So all subsequent versions should
 +       * also have the same support.
 +       */
 +      if ((version_major > 0x01) ||
 +          ((version_major == 0x01) && (version_minor >= 0x50)))
 +              adev->uvd.max_handles = AMDGPU_MAX_UVD_HANDLES;
 +
+       adev->uvd.fw_version = ((version_major << 24) | (version_minor << 16) |
+                               (family_id << 8));
        bo_size = AMDGPU_GPU_PAGE_ALIGN(le32_to_cpu(hdr->ucode_size_bytes) + 8)
 -               +  AMDGPU_UVD_STACK_SIZE + AMDGPU_UVD_HEAP_SIZE;
 +                +  AMDGPU_UVD_STACK_SIZE + AMDGPU_UVD_HEAP_SIZE
 +                +  AMDGPU_UVD_SESSION_SIZE * adev->uvd.max_handles;
        r = amdgpu_bo_create(adev, bo_size, PAGE_SIZE, true,
                             AMDGPU_GEM_DOMAIN_VRAM,
                             AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
index 547d759a0a6fb528683510e853d441388f3ca5b8,018449f8d55750d0546ac0891e78662a67a65ab3..cec508f9a33509a3507c55cf366425b6717c45c0
@@@ -919,12 -878,21 +919,11 @@@ out
                drm_crtc_handle_vblank(&ctx->crtc->base);
  }
  
 -static void fimd_dp_clock_enable(struct exynos_drm_crtc *crtc, bool enable)
 +static void fimd_dp_clock_enable(struct exynos_drm_clk *clk, bool enable)
  {
 -      struct fimd_context *ctx = crtc->ctx;
 -      u32 val;
 -
 -      /*
 -       * Only Exynos 5250, 5260, 5410 and 542x requires enabling DP/MIE
 -       * clock. On these SoCs the bootloader may enable it but any
 -       * power domain off/on will reset it to disable state.
 -       */
 -      if (ctx->driver_data != &exynos5_fimd_driver_data &&
 -          ctx->driver_data != &exynos5420_fimd_driver_data)
 -              return;
 -
 -      val = enable ? DP_MIE_CLK_DP_ENABLE : DP_MIE_CLK_DISABLE;
 +      struct fimd_context *ctx = container_of(clk, struct fimd_context,
 +                                              dp_clk);
 +      u32 val = enable ? DP_MIE_CLK_DP_ENABLE : DP_MIE_CLK_DISABLE;
        writel(val, ctx->regs + DP_MIE_CLKCON);
  }
  
Simple merge
Simple merge
Simple merge
Simple merge
index 301e2371c34f5c260e95c9a1fc7b2122329497cf,e3daafa1be1322222a038adb450b90bc8b7be695..39386f50af876fd9494f9064384c5d050918d301
@@@ -227,26 -230,13 +227,17 @@@ EXPORT_SYMBOL(ttm_bo_del_sub_from_lru)
  
  void ttm_bo_move_to_lru_tail(struct ttm_buffer_object *bo)
  {
 +      struct ttm_bo_device *bdev = bo->bdev;
+       int put_count = 0;
  
        lockdep_assert_held(&bo->resv->lock.base);
  
-       if (bo->mem.placement & TTM_PL_FLAG_NO_EVICT) {
-               list_del_init(&bo->swap);
-               list_del_init(&bo->lru);
-       } else {
-               if (bo->ttm && !(bo->ttm->page_flags & TTM_PAGE_FLAG_SG)) {
-                       list_del(&bo->swap);
-                       list_add(&bo->swap, bdev->driver->swap_lru_tail(bo));
-               }
-               list_del(&bo->lru);
-               list_add(&bo->lru, bdev->driver->lru_tail(bo));
-       }
 +      if (bdev->driver->lru_removal)
 +              bdev->driver->lru_removal(bo);
 +
+       put_count = ttm_bo_del_from_lru(bo);
+       ttm_bo_list_ref_sub(bo, put_count, true);
+       ttm_bo_add_to_lru(bo);
  }
  EXPORT_SYMBOL(ttm_bo_move_to_lru_tail);