drm/i915: clean up plane bpp confusion
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 26 Mar 2013 23:45:00 +0000 (00:45 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 28 Mar 2013 00:09:34 +0000 (01:09 +0100)
- There is no 16bpc linear color format in our hw. gen4+ has a 16 bpc
  float layout, but we don't really support it.
- 10bpc is a gen4+ feature, fix up the support for it.
- Update_plane should never see a wrong fb bpp value, BUG in the
  corresponding cases.

v2: Rebase on top of Ville's plane pixel layout changes.

v3: Actually drop the old gen4 check for 10bpc planes, spotted
by Ville Syrjälä.

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c

index e95c469afa6da0fcf50913a922989887c3293284..70c22b12b7c9b0247e31a665dff06dcadb3f7ca6 100644 (file)
@@ -2113,8 +2113,7 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,
                dspcntr |= DISPPLANE_RGBX101010;
                break;
        default:
-               DRM_ERROR("Unknown pixel format 0x%08x\n", fb->pixel_format);
-               return -EINVAL;
+               BUG();
        }
 
        if (INTEL_INFO(dev)->gen >= 4) {
@@ -2207,8 +2206,7 @@ static int ironlake_update_plane(struct drm_crtc *crtc,
                dspcntr |= DISPPLANE_RGBX101010;
                break;
        default:
-               DRM_ERROR("Unknown pixel format 0x%08x\n", fb->pixel_format);
-               return -EINVAL;
+               BUG();
        }
 
        if (obj->tiling_mode != I915_TILING_NONE)
@@ -7400,21 +7398,19 @@ pipe_config_set_bpp(struct drm_crtc *crtc,
                bpp = 8*3;
                break;
        case 30:
+               if (INTEL_INFO(dev)->gen < 4) {
+                       DRM_DEBUG_KMS("10 bpc not supported on gen2/3\n");
+                       return -EINVAL;
+               }
+
                bpp = 10*3;
                break;
-       case 48:
-               bpp = 12*3;
-               break;
+       /* TODO: gen4+ supports 16 bpc floating point, too. */
        default:
                DRM_DEBUG_KMS("unsupported depth\n");
                return -EINVAL;
        }
 
-       if (fb->depth > 24 && !HAS_PCH_SPLIT(dev)) {
-               DRM_DEBUG_KMS("high depth not supported on gmch platforms\n");
-               return -EINVAL;
-       }
-
        pipe_config->pipe_bpp = bpp;
 
        /* Clamp display bpp to EDID value */