[media] drxd: provide ability to control rs byte
authorDevin Heitmueller <dheitmueller@kernellabs.com>
Sun, 13 Mar 2011 04:54:02 +0000 (01:54 -0300)
committerMauro Carvalho Chehab <mchehab@redhat.com>
Fri, 20 May 2011 10:26:18 +0000 (07:26 -0300)
Provide the ability for the board configuration to specify whether to insert
the RS byte into the TS interconnect to the bridge, while not required for
the ngene in fact is required for the em28xx.

Signed-off-by: Devin Heitmueller <dheitmueller@kernellabs.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
drivers/media/dvb/frontends/drxd.h
drivers/media/dvb/frontends/drxd_hard.c

index 9b11dc835c440f5c72f25c49b8a364174b41f22b..81093b9b1568f47a839c9b962ee95638b476296b 100644 (file)
@@ -38,6 +38,7 @@ struct drxd_config
 #define DRXD_PLL_MT3X0823 2
 
        u32 clock;
+       u8 insert_rs_byte;
 
        u8 demod_address;
        u8 demoda_address;
index c4835b32e6d9b9ea0ff67c3d5ac3c57d3df24261..994195fe9fbb5fc01185c9dbd2cee4f293f5172a 100644 (file)
@@ -2449,7 +2449,7 @@ static int CDRXD(struct drxd_state *state, u32 IntermediateFrequency)
        state->tuner_mirrors=0;
 
        /* modify MPEG output attributes */
-       state->insert_rs_byte = 0;
+       state->insert_rs_byte = state->config.insert_rs_byte;
        state->enable_parallel = (ulSerialMode != 1);
 
        /* Timing div, 250ns/Psys */