u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
- ath79_setup_ar933x_phy4_switch(false, true);
+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */
+ ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_m25p80(&tl_mr11u_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr11u_leds_gpio),
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
- ath79_eth0_data.phy_mask = BIT(0);
ath79_register_wmac(ee, mac);
}
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
- ath79_setup_ar933x_phy4_switch(false, true);
+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */
+ ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_m25p80(&tl_mr3020_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3020_leds_gpio),
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
- ath79_eth0_data.phy_mask = BIT(0);
ath79_register_wmac(ee, mac);
}
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */
+ ath79_setup_ar933x_phy4_switch(false, false);
+
ath79_register_m25p80(&tl_wr703n_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr703n_leds_gpio),
tl_wr703n_leds_gpio);