Migrate the system IO configuration setting to Kconfig.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
source "arch/powerpc/cpu/mpc83xx/lblaw/Kconfig"
source "arch/powerpc/cpu/mpc83xx/elbc/Kconfig"
source "arch/powerpc/cpu/mpc83xx/hid/Kconfig"
+source "arch/powerpc/cpu/mpc83xx/sysio/Kconfig"
menu "Legacy options"
#include "lblaw/lblaw.h"
#include "elbc/elbc.h"
+#include "sysio/sysio.h"
DECLARE_GLOBAL_DATA_PTR;
--- /dev/null
+menu "System I/O configuration"
+
+if ARCH_MPC8308
+source "arch/powerpc/cpu/mpc83xx/sysio/Kconfig.mpc8308"
+endif
+
+endmenu
--- /dev/null
+choice
+ prompt "SPI group"
+
+config SICR_SPI_SPI
+ bool "SPI"
+
+config SICR_SPI_MSRCID
+ bool "MSRCID"
+
+config SICR_SPI_LSRCID
+ bool "LSRCID"
+
+endchoice
+
+choice
+ prompt "UART group"
+
+config SICR_UART_SPI
+ bool "UART"
+
+config SICR_UART_MSRCID
+ bool "MSRCID"
+
+config SICR_UART_LSRCID
+ bool "LSRCID"
+
+endchoice
+
+choice
+ prompt "IRQ group"
+
+config SICR_IRQ_SPI
+ bool "IRQ"
+
+config SICR_IRQ_MCP_CKSTOP
+ bool "MCP/CKSTOP"
+
+config SICR_IRQ_INTA
+ bool "INTA"
+
+endchoice
+
+choice
+ prompt "I2C2 group"
+
+config SICR_I2C2_I2C
+ bool "IRQ"
+
+config SICR_I2C2_CKSTOP
+ bool "CKSTOP"
+
+endchoice
+
+choice
+ prompt "ETSEC1 A group"
+
+config SICR_ETSEC1_A_TSEC2
+ bool "TSEC1"
+
+config SICR_ETSEC1_A_TSEC_GTX_CLK125
+ bool "TSEC1 GTX_CLK125"
+
+endchoice
+
+choice
+ prompt "eSDHC A group"
+
+config SICR_ESDHC_A_SD
+ bool "SD"
+
+config SICR_ESDHC_A_GTM
+ bool "GTM"
+
+config SICR_ESDHC_A_GPIO
+ bool "GPIO"
+
+endchoice
+
+choice
+ prompt "eSDHC B group"
+
+config SICR_ESDHC_B_SD
+ bool "SD"
+
+config SICR_ESDHC_B_GTM
+ bool "GTM"
+
+config SICR_ESDHC_B_GPIO
+ bool "GPIO"
+
+endchoice
+
+choice
+ prompt "eSDHC C group"
+
+config SICR_ESDHC_C_SD
+ bool "SD"
+
+config SICR_ESDHC_C_GTM
+ bool "GTM"
+
+config SICR_ESDHC_C_GPIO
+ bool "GPIO"
+
+endchoice
+
+choice
+ prompt "GPIO A group"
+
+config SICR_GPIO_A_GPIO
+ bool "GPIO"
+
+config SICR_GPIO_A_TSEC2
+ bool "TSEC2"
+
+endchoice
+
+choice
+ prompt "GPIO B group"
+
+config SICR_GPIO_B_GPIO
+ bool "GPIO"
+
+config SICR_GPIO_B_TSEC2
+ bool "TSEC2"
+
+config SICR_GPIO_B_TSEC_GTX_CLK125
+ bool "TSEC2 GTX_CLK125"
+
+endchoice
+
+choice
+ prompt "IEEE1588 A group"
+
+config SICR_IEEE1588_A_TSEC
+ bool "TSEC"
+
+config SICR_IEEE1588_A_GPIO
+ bool "GPIO"
+
+endchoice
+
+choice
+ prompt "USB group"
+
+config SICR_USB_TSEC
+ bool "USB"
+
+endchoice
+
+choice
+ prompt "GTM group"
+
+config SICR_GTM_TSEC
+ bool "GTM"
+
+config SICR_GTM_GPIO
+ bool "GPIO"
+
+endchoice
+
+choice
+ prompt "IEEE1588 B group"
+
+config SICR_IEEE1588_B_GPIO
+ bool "GPIO"
+
+endchoice
+
+choice
+ prompt "ETSEC2 group"
+
+config SICR_ETSEC2_TSEC2
+ bool "TSEC2"
+
+config SICR_ETSEC2_GPIO
+ bool "GPIO"
+
+endchoice
+
+choice
+ prompt "GPIO selection"
+
+config SICR_GPIOSEL_GPIO
+ bool "GPIO_A, GPIO_B"
+
+config SICR_GPIOSEL_IEEE1588
+ bool "IEEE1588_A, IEEE1588_B, ETSEC2"
+
+endchoice
+
+choice
+ prompt "IEEE1588 timer output buffer impedance"
+
+config SICR_TMROBI_3_3_V
+ bool "40 Ohm, 3.3V"
+
+config SICR_TMROBI_2_5_V
+ bool "40 Ohm, 2.5V"
+
+endchoice
+
+choice
+ prompt "TSEC1 output buffer impedance"
+
+config SICR_TMSOBI1_3_3_V
+ bool "40 Ohm, 3.3V"
+
+config SICR_TMSOBI1_2_5_V
+ bool "40 Ohm, 2.5V"
+
+endchoice
+
+choice
+ prompt "TSEC2 output buffer impedance"
+
+config SICR_TMSOBI2_3_3_V
+ bool "40 Ohm, 3.3V"
+
+config SICR_TMSOBI2_2_5_V
+ bool "40 Ohm, 2.5V"
+
+endchoice
+
+config SICRL_SPI
+ hex
+ default 0x0 if SICR_SPI_SPI
+ default 0x10000000 if SICR_SPI_MSRCID
+ default 0x30000000 if SICR_SPI_LSRCID
+
+config SICRL_UART
+ hex
+ default 0x0 if SICR_UART_SPI
+ default 0x4000000 if SICR_UART_MSRCID
+ default 0xc000000 if SICR_UART_LSRCID
+
+config SICRL_IRQ
+ hex
+ default 0x0 if SICR_IRQ_SPI
+ default 0x1000000 if SICR_IRQ_MCP_CKSTOP
+ default 0x3000000 if SICR_IRQ_INTA
+
+config SICRL_I2C2
+ hex
+ default 0x0 if SICR_I2C2_I2C
+ default 0x100000 if SICR_I2C2_CKSTOP
+
+config SICRL_ETSEC1_A
+ hex
+ default 0x0 if SICR_ETSEC1_A_TSEC2
+ default 0x40 if SICR_ETSEC1_A_TSEC_GTX_CLK125
+
+config SICRH_ESDHC_A
+ hex
+ default 0x0 if SICR_ESDHC_A_SD
+ default 0x40000000 if SICR_ESDHC_A_GTM
+ default 0xc0000000 if SICR_ESDHC_A_GPIO
+
+config SICRH_ESDHC_B
+ hex
+ default 0x0 if SICR_ESDHC_B_SD
+ default 0x10000000 if SICR_ESDHC_B_GTM
+ default 0x30000000 if SICR_ESDHC_B_GPIO
+
+config SICRH_ESDHC_C
+ hex
+ default 0x0 if SICR_ESDHC_C_SD
+ default 0x4000000 if SICR_ESDHC_C_GTM
+ default 0xc000000 if SICR_ESDHC_C_GPIO
+
+config SICRH_GPIO_A
+ hex
+ default 0x0 if SICR_GPIO_A_GPIO
+ default 0x1000000 if SICR_GPIO_A_TSEC2
+
+config SICRH_GPIO_B
+ hex
+ default 0x0 if SICR_GPIO_B_GPIO
+ default 0x400000 if SICR_GPIO_B_TSEC2
+ default 0x800000 if SICR_GPIO_B_TSEC_GTX_CLK125
+
+config SICRH_IEEE1588_A
+ hex
+ default 0x100000 if SICR_IEEE1588_A_TSEC
+ default 0x300000 if SICR_IEEE1588_A_GPIO
+
+config SICRH_USB
+ hex
+ default 0x40000 if SICR_USB_TSEC
+
+config SICRH_GTM
+ hex
+ default 0x10000 if SICR_GTM_TSEC
+ default 0x30000 if SICR_GTM_GPIO
+
+config SICRH_IEEE1588_B
+ hex
+ default 0xc000 if SICR_IEEE1588_B_GPIO
+
+config SICRH_ETSEC2
+ hex
+ default 0x1000 if SICR_ETSEC2_TSEC2
+ default 0x3000 if SICR_ETSEC2_GPIO
+
+config SICRH_GPIOSEL
+ hex
+ default 0x0 if SICR_GPIOSEL_GPIO
+ default 0x100 if SICR_GPIOSEL_IEEE1588
+
+config SICRH_TMROBI
+ hex
+ default 0x0 if SICR_TMROBI_3_3_V
+ default 0x10 if SICR_TMROBI_2_5_V
+
+config SICRH_TMSOBI1
+ hex
+ default 0x0 if SICR_TMSOBI1_3_3_V
+ default 0x2 if SICR_TMSOBI1_2_5_V
+
+config SICRH_TMSOBI2
+ hex
+ default 0x0 if SICR_TMSOBI2_3_3_V
+ default 0x1 if SICR_TMSOBI2_2_5_V
--- /dev/null
+#ifdef CONFIG_ARCH_MPC8308
+
+#ifndef CONFIG_SYS_SICRL
+#define CONFIG_SYS_SICRL (\
+ CONFIG_SICRL_SPI |\
+ CONFIG_SICRL_UART |\
+ CONFIG_SICRL_IRQ |\
+ CONFIG_SICRL_I2C2 |\
+ CONFIG_SICRL_ETSEC1_A \
+)
+#endif
+
+#ifndef CONFIG_SYS_SICRH
+#define CONFIG_SYS_SICRH (\
+ CONFIG_SICRH_ESDHC_A |\
+ CONFIG_SICRH_ESDHC_B |\
+ CONFIG_SICRH_ESDHC_C |\
+ CONFIG_SICRH_GPIO_A |\
+ CONFIG_SICRH_GPIO_B |\
+ CONFIG_SICRH_IEEE1588_A |\
+ CONFIG_SICRH_USB |\
+ CONFIG_SICRH_GTM |\
+ CONFIG_SICRH_IEEE1588_B |\
+ CONFIG_SICRH_ETSEC2 |\
+ CONFIG_SICRH_GPIOSEL |\
+ CONFIG_SICRH_TMROBI |\
+ CONFIG_SICRH_TMSOBI1 |\
+ CONFIG_SICRH_TMSOBI2 \
+)
+#endif
+
+#endif
CONFIG_HID0_FINAL_DPM=y
CONFIG_HID0_FINAL_ICE=y
CONFIG_HID2_HBE=y
+CONFIG_SICR_ETSEC1_A_TSEC_GTX_CLK125=y
+CONFIG_SICR_GPIO_A_TSEC2=y
+CONFIG_SICR_GPIO_B_TSEC_GTX_CLK125=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
+CONFIG_SICR_TMSOBI1_2_5_V=y
+CONFIG_SICR_TMSOBI2_2_5_V=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_HID0_FINAL_DPM=y
CONFIG_HID0_FINAL_ICE=y
CONFIG_HID2_HBE=y
+CONFIG_SICR_ETSEC1_A_TSEC_GTX_CLK125=y
+CONFIG_SICR_GPIO_A_GPIO=y
+CONFIG_SICR_GPIO_B_GPIO=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_ETSEC2_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
+CONFIG_SICR_TMSOBI1_2_5_V=y
+CONFIG_SICR_TMSOBI2_2_5_V=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_HID0_FINAL_DPM=y
CONFIG_HID0_FINAL_ICE=y
CONFIG_HID2_HBE=y
+CONFIG_SICR_ETSEC1_A_TSEC_GTX_CLK125=y
+CONFIG_SICR_GPIO_A_GPIO=y
+CONFIG_SICR_GPIO_B_GPIO=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_ETSEC2_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
+CONFIG_SICR_TMSOBI1_2_5_V=y
+CONFIG_SICR_TMSOBI2_2_5_V=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_HID0_FINAL_DPM=y
CONFIG_HID0_FINAL_ICE=y
CONFIG_HID2_HBE=y
+CONFIG_SICR_ESDHC_A_GPIO=y
+CONFIG_SICR_ESDHC_B_GPIO=y
+CONFIG_SICR_ESDHC_C_GTM=y
+CONFIG_SICR_GPIO_A_TSEC2=y
+CONFIG_SICR_GPIO_B_TSEC2=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=5
CONFIG_HID0_FINAL_DPM=y
CONFIG_HID0_FINAL_ICE=y
CONFIG_HID2_HBE=y
+CONFIG_SICR_ETSEC1_A_TSEC2=y
+CONFIG_SICR_GPIO_A_GPIO=y
+CONFIG_SICR_GPIO_B_GPIO=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_ETSEC2_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
+CONFIG_SICR_TMSOBI1_2_5_V=y
+CONFIG_SICR_TMSOBI2_2_5_V=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_HID0_FINAL_DPM=y
CONFIG_HID0_FINAL_ICE=y
CONFIG_HID2_HBE=y
+CONFIG_SICR_ETSEC1_A_TSEC2=y
+CONFIG_SICR_GPIO_A_GPIO=y
+CONFIG_SICR_GPIO_B_GPIO=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_ETSEC2_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
+CONFIG_SICR_TMSOBI1_2_5_V=y
+CONFIG_SICR_TMSOBI2_2_5_V=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_HID0_FINAL_DPM=y
CONFIG_HID0_FINAL_ICE=y
CONFIG_HID2_HBE=y
+CONFIG_SICR_ETSEC1_A_TSEC2=y
+CONFIG_SICR_GPIO_A_GPIO=y
+CONFIG_SICR_GPIO_B_GPIO=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_ETSEC2_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
+CONFIG_SICR_TMSOBI1_2_5_V=y
+CONFIG_SICR_TMSOBI2_2_5_V=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_HID0_FINAL_DPM=y
CONFIG_HID0_FINAL_ICE=y
CONFIG_HID2_HBE=y
+CONFIG_SICR_ETSEC1_A_TSEC2=y
+CONFIG_SICR_GPIO_A_GPIO=y
+CONFIG_SICR_GPIO_B_GPIO=y
+CONFIG_SICR_IEEE1588_A_GPIO=y
+CONFIG_SICR_GTM_GPIO=y
+CONFIG_SICR_ETSEC2_GPIO=y
+CONFIG_SICR_GPIOSEL_IEEE1588=y
+CONFIG_SICR_TMSOBI1_2_5_V=y
+CONFIG_SICR_TMSOBI2_2_5_V=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
#define CONFIG_TSEC1
#define CONFIG_VSC7385_ENET
-/*
- * System IO Config
- */
-#define CONFIG_SYS_SICRH (\
- SICRH_ESDHC_A_SD |\
- SICRH_ESDHC_B_SD |\
- SICRH_ESDHC_C_SD |\
- SICRH_GPIO_A_TSEC2 |\
- SICRH_GPIO_B_TSEC2_GTX_CLK125 |\
- SICRH_IEEE1588_A_GPIO |\
- SICRH_USB |\
- SICRH_GTM_GPIO |\
- SICRH_IEEE1588_B_GPIO |\
- SICRH_ETSEC2_CRS |\
- SICRH_GPIOSEL_1 |\
- SICRH_TMROBI_V3P3 |\
- SICRH_TSOBI1_V2P5 |\
- SICRH_TSOBI2_V2P5) /* 0x01b7d103 */
-#define CONFIG_SYS_SICRL (\
- SICRL_SPI_PF0 |\
- SICRL_UART_PF0 |\
- SICRL_IRQ_PF0 |\
- SICRL_I2C2_PF0 |\
- SICRL_ETSEC1_GTX_CLK125) /* 0x00000040 */
-
/*
* SERDES
*/
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
-/*
- * System IO Config
- */
-#define CONFIG_SYS_SICRH (\
- SICRH_ESDHC_A_SD |\
- SICRH_ESDHC_B_SD |\
- SICRH_ESDHC_C_SD |\
- SICRH_GPIO_A_GPIO |\
- SICRH_GPIO_B_GPIO |\
- SICRH_IEEE1588_A_GPIO |\
- SICRH_USB |\
- SICRH_GTM_GPIO |\
- SICRH_IEEE1588_B_GPIO |\
- SICRH_ETSEC2_GPIO |\
- SICRH_GPIOSEL_1 |\
- SICRH_TMROBI_V3P3 |\
- SICRH_TSOBI1_V2P5 |\
- SICRH_TSOBI2_V2P5) /* 0x0037f103 */
-#define CONFIG_SYS_SICRL (\
- SICRL_SPI_PF0 |\
- SICRL_UART_PF0 |\
- SICRL_IRQ_PF0 |\
- SICRL_I2C2_PF0 |\
- SICRL_ETSEC1_GTX_CLK125) /* 0x00000000 */
-
/*
* SERDES
*/
#define CONFIG_TSEC1
#define CONFIG_TSEC2
-/*
- * System IO Config
- */
-#define CONFIG_SYS_SICRH (\
- SICRH_ESDHC_A_GPIO |\
- SICRH_ESDHC_B_GPIO |\
- SICRH_ESDHC_C_GTM |\
- SICRH_GPIO_A_TSEC2 |\
- SICRH_GPIO_B_TSEC2_TX_CLK |\
- SICRH_IEEE1588_A_GPIO |\
- SICRH_USB |\
- SICRH_GTM_GPIO |\
- SICRH_IEEE1588_B_GPIO |\
- SICRH_ETSEC2_CRS |\
- SICRH_GPIOSEL_1 |\
- SICRH_TMROBI_V3P3 |\
- SICRH_TSOBI1_V3P3 |\
- SICRH_TSOBI2_V3P3) /* 0xf577d100 */
-#define CONFIG_SYS_SICRL (\
- SICRL_SPI_PF0 |\
- SICRL_UART_PF0 |\
- SICRL_IRQ_PF0 |\
- SICRL_I2C2_PF0 |\
- SICRL_ETSEC1_TX_CLK) /* 0x00000000 */
-
#define CONFIG_SYS_GPIO1_PRELIM
/* GPIO Default input/output settings */
#define CONFIG_SYS_GPIO1_DIR 0x7AAF8C00
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
-/*
- * System IO Config
- */
-#define CONFIG_SYS_SICRH (\
- SICRH_ESDHC_A_SD |\
- SICRH_ESDHC_B_SD |\
- SICRH_ESDHC_C_SD |\
- SICRH_GPIO_A_GPIO |\
- SICRH_GPIO_B_GPIO |\
- SICRH_IEEE1588_A_GPIO |\
- SICRH_USB |\
- SICRH_GTM_GPIO |\
- SICRH_IEEE1588_B_GPIO |\
- SICRH_ETSEC2_GPIO |\
- SICRH_GPIOSEL_1 |\
- SICRH_TMROBI_V3P3 |\
- SICRH_TSOBI1_V2P5 |\
- SICRH_TSOBI2_V2P5) /* 0x0037f103 */
-#define CONFIG_SYS_SICRL (\
- SICRL_SPI_PF0 |\
- SICRL_UART_PF0 |\
- SICRL_IRQ_PF0 |\
- SICRL_I2C2_PF0 |\
- SICRL_ETSEC1_TX_CLK) /* 0x00000000 */
-
/*
* SERDES
*/