{
__asm__ __volatile__(
LOCK_PREFIX "addl %1,%0"
- :"=m" (v->counter)
- :"ir" (i), "m" (v->counter));
+ :"+m" (v->counter)
+ :"ir" (i));
}
/**
{
__asm__ __volatile__(
LOCK_PREFIX "subl %1,%0"
- :"=m" (v->counter)
- :"ir" (i), "m" (v->counter));
+ :"+m" (v->counter)
+ :"ir" (i));
}
/**
__asm__ __volatile__(
LOCK_PREFIX "subl %2,%0; sete %1"
- :"=m" (v->counter), "=qm" (c)
- :"ir" (i), "m" (v->counter) : "memory");
+ :"+m" (v->counter), "=qm" (c)
+ :"ir" (i) : "memory");
return c;
}
{
__asm__ __volatile__(
LOCK_PREFIX "incl %0"
- :"=m" (v->counter)
- :"m" (v->counter));
+ :"+m" (v->counter));
}
/**
{
__asm__ __volatile__(
LOCK_PREFIX "decl %0"
- :"=m" (v->counter)
- :"m" (v->counter));
+ :"+m" (v->counter));
}
/**
__asm__ __volatile__(
LOCK_PREFIX "decl %0; sete %1"
- :"=m" (v->counter), "=qm" (c)
- :"m" (v->counter) : "memory");
+ :"+m" (v->counter), "=qm" (c)
+ : : "memory");
return c != 0;
}
__asm__ __volatile__(
LOCK_PREFIX "incl %0; sete %1"
- :"=m" (v->counter), "=qm" (c)
- :"m" (v->counter) : "memory");
+ :"+m" (v->counter), "=qm" (c)
+ : : "memory");
return c != 0;
}
__asm__ __volatile__(
LOCK_PREFIX "addl %2,%0; sets %1"
- :"=m" (v->counter), "=qm" (c)
- :"ir" (i), "m" (v->counter) : "memory");
+ :"+m" (v->counter), "=qm" (c)
+ :"ir" (i) : "memory");
return c;
}
.align 8\n\
.long 1b,3b\n\
.previous" \
- : "=r" (oldval), "=r" (ret), "=m" (*uaddr) \
- : "i" (-EFAULT), "m" (*uaddr), "0" (oparg), "1" (0))
+ : "=r" (oldval), "=r" (ret), "+m" (*uaddr) \
+ : "i" (-EFAULT), "0" (oparg), "1" (0))
#define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \
__asm__ __volatile ( \
.align 8\n\
.long 1b,4b,2b,4b\n\
.previous" \
- : "=&a" (oldval), "=&r" (ret), "=m" (*uaddr), \
+ : "=&a" (oldval), "=&r" (ret), "+m" (*uaddr), \
"=&r" (tem) \
- : "r" (oparg), "i" (-EFAULT), "m" (*uaddr), "1" (0))
+ : "r" (oparg), "i" (-EFAULT), "1" (0))
static inline int
futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
" .long 1b,3b \n"
" .previous \n"
- : "=a" (oldval), "=m" (*uaddr)
+ : "=a" (oldval), "+m" (*uaddr)
: "i" (-EFAULT), "r" (newval), "0" (oldval)
: "memory"
);
{
__asm__ __volatile__(
"incl %0"
- :"=m" (v->counter)
- :"m" (v->counter));
+ :"+m" (v->counter));
}
static __inline__ void local_dec(local_t *v)
{
__asm__ __volatile__(
"decl %0"
- :"=m" (v->counter)
- :"m" (v->counter));
+ :"+m" (v->counter));
}
static __inline__ void local_add(long i, local_t *v)
{
__asm__ __volatile__(
"addl %1,%0"
- :"=m" (v->counter)
- :"ir" (i), "m" (v->counter));
+ :"+m" (v->counter)
+ :"ir" (i));
}
static __inline__ void local_sub(long i, local_t *v)
{
__asm__ __volatile__(
"subl %1,%0"
- :"=m" (v->counter)
- :"ir" (i), "m" (v->counter));
+ :"+m" (v->counter)
+ :"ir" (i));
}
/* On x86, these are no better than the atomic variants. */
#undef __FD_SET
#define __FD_SET(fd,fdsetp) \
__asm__ __volatile__("btsl %1,%0": \
- "=m" (*(__kernel_fd_set *) (fdsetp)):"r" ((int) (fd)))
+ "+m" (*(__kernel_fd_set *) (fdsetp)):"r" ((int) (fd)))
#undef __FD_CLR
#define __FD_CLR(fd,fdsetp) \
__asm__ __volatile__("btrl %1,%0": \
- "=m" (*(__kernel_fd_set *) (fdsetp)):"r" ((int) (fd)))
+ "+m" (*(__kernel_fd_set *) (fdsetp)):"r" ((int) (fd)))
#undef __FD_ISSET
#define __FD_ISSET(fd,fdsetp) (__extension__ ({ \
"popl %%eax\n\t" \
"1:\n", \
"subl $1,%0\n\t", \
- "=m" (*(volatile int *)rw) : : "memory")
+ "+m" (*(volatile int *)rw) : : "memory")
#define __build_read_lock(rw, helper) do { \
if (__builtin_constant_p(rw)) \
"popl %%eax\n\t" \
"1:\n", \
"subl $" RW_LOCK_BIAS_STR ",%0\n\t", \
- "=m" (*(volatile int *)rw) : : "memory")
+ "+m" (*(volatile int *)rw) : : "memory")
#define __build_write_lock(rw, helper) do { \
if (__builtin_constant_p(rw)) \
" jmp 1b\n"
LOCK_SECTION_END
"# ending down_read\n\t"
- : "=m"(sem->count)
- : "a"(sem), "m"(sem->count)
+ : "+m" (sem->count)
+ : "a" (sem)
: "memory", "cc");
}
" jnz 1b\n\t"
"2:\n\t"
"# ending __down_read_trylock\n\t"
- : "+m"(sem->count), "=&a"(result), "=&r"(tmp)
- : "i"(RWSEM_ACTIVE_READ_BIAS)
+ : "+m" (sem->count), "=&a" (result), "=&r" (tmp)
+ : "i" (RWSEM_ACTIVE_READ_BIAS)
: "memory", "cc");
return result>=0 ? 1 : 0;
}
" jmp 1b\n"
LOCK_SECTION_END
"# ending down_write"
- : "=m"(sem->count), "=d"(tmp)
- : "a"(sem), "1"(tmp), "m"(sem->count)
+ : "+m" (sem->count), "=d" (tmp)
+ : "a" (sem), "1" (tmp)
: "memory", "cc");
}
" jmp 1b\n"
LOCK_SECTION_END
"# ending __up_read\n"
- : "=m"(sem->count), "=d"(tmp)
- : "a"(sem), "1"(tmp), "m"(sem->count)
+ : "+m" (sem->count), "=d" (tmp)
+ : "a" (sem), "1" (tmp)
: "memory", "cc");
}
" jmp 1b\n"
LOCK_SECTION_END
"# ending __up_write\n"
- : "=m"(sem->count)
- : "a"(sem), "i"(-RWSEM_ACTIVE_WRITE_BIAS), "m"(sem->count)
+ : "+m" (sem->count)
+ : "a" (sem), "i" (-RWSEM_ACTIVE_WRITE_BIAS)
: "memory", "cc", "edx");
}
" jmp 1b\n"
LOCK_SECTION_END
"# ending __downgrade_write\n"
- : "=m"(sem->count)
- : "a"(sem), "i"(-RWSEM_WAITING_BIAS), "m"(sem->count)
+ : "+m" (sem->count)
+ : "a" (sem), "i" (-RWSEM_WAITING_BIAS)
: "memory", "cc");
}
{
__asm__ __volatile__(
LOCK_PREFIX "addl %1,%0"
- : "=m"(sem->count)
- : "ir"(delta), "m"(sem->count));
+ : "+m" (sem->count)
+ : "ir" (delta));
}
/*
int tmp = delta;
__asm__ __volatile__(
-LOCK_PREFIX "xadd %0,(%2)"
- : "+r"(tmp), "=m"(sem->count)
- : "r"(sem), "m"(sem->count)
- : "memory");
+LOCK_PREFIX "xadd %0,%1"
+ : "+r" (tmp), "+m" (sem->count)
+ : : "memory");
return tmp+delta;
}
"call __down_failed\n\t"
"jmp 1b\n"
LOCK_SECTION_END
- :"=m" (sem->count)
+ :"+m" (sem->count)
:
:"memory","ax");
}
"call __down_failed_interruptible\n\t"
"jmp 1b\n"
LOCK_SECTION_END
- :"=a" (result), "=m" (sem->count)
+ :"=a" (result), "+m" (sem->count)
:
:"memory");
return result;
"call __down_failed_trylock\n\t"
"jmp 1b\n"
LOCK_SECTION_END
- :"=a" (result), "=m" (sem->count)
+ :"=a" (result), "+m" (sem->count)
:
:"memory");
return result;
"jmp 1b\n"
LOCK_SECTION_END
".subsection 0\n"
- :"=m" (sem->count)
+ :"+m" (sem->count)
:
:"memory","ax");
}
alternative_smp(
__raw_spin_lock_string,
__raw_spin_lock_string_up,
- "=m" (lock->slock) : : "memory");
+ "+m" (lock->slock) : : "memory");
}
/*
alternative_smp(
__raw_spin_lock_string_flags,
__raw_spin_lock_string_up,
- "=m" (lock->slock) : "r" (flags) : "memory");
+ "+m" (lock->slock) : "r" (flags) : "memory");
}
#endif
char oldval;
__asm__ __volatile__(
"xchgb %b0,%1"
- :"=q" (oldval), "=m" (lock->slock)
+ :"=q" (oldval), "+m" (lock->slock)
:"0" (0) : "memory");
return oldval > 0;
}
#define __raw_spin_unlock_string \
"movb $1,%0" \
- :"=m" (lock->slock) : : "memory"
+ :"+m" (lock->slock) : : "memory"
static inline void __raw_spin_unlock(raw_spinlock_t *lock)
#define __raw_spin_unlock_string \
"xchgb %b0, %1" \
- :"=q" (oldval), "=m" (lock->slock) \
+ :"=q" (oldval), "+m" (lock->slock) \
:"0" (oldval) : "memory"
static inline void __raw_spin_unlock(raw_spinlock_t *lock)
static inline void __raw_read_unlock(raw_rwlock_t *rw)
{
- asm volatile(LOCK_PREFIX "incl %0" :"=m" (rw->lock) : : "memory");
+ asm volatile(LOCK_PREFIX "incl %0" :"+m" (rw->lock) : : "memory");
}
static inline void __raw_write_unlock(raw_rwlock_t *rw)
{
asm volatile(LOCK_PREFIX "addl $" RW_LOCK_BIAS_STR ", %0"
- : "=m" (rw->lock) : : "memory");
+ : "+m" (rw->lock) : : "memory");
}
#endif /* __ASM_SPINLOCK_H */