fix for 3.2.9
authorJohn Crispin <john@openwrt.org>
Sun, 25 Mar 2012 08:50:42 +0000 (08:50 +0000)
committerJohn Crispin <john@openwrt.org>
Sun, 25 Mar 2012 08:50:42 +0000 (08:50 +0000)
SVN-Revision: 31065

package/ltq-dsl/src/ifxmips_atm_amazon_se.c
package/ltq-dsl/src/ifxmips_atm_ar9.c
package/ltq-dsl/src/ifxmips_atm_danube.c
package/ltq-dsl/src/ifxmips_compat.h

index 35a5cd9d530d544214ac7f196c20bdfcbda9cc2a..1028815927e66f76d061ce04b080cbead2f8a9e6 100644 (file)
@@ -40,6 +40,7 @@
 #include <linux/proc_fs.h>
 #include <linux/init.h>
 #include <linux/ioctl.h>
+#include <linux/clk.h>
 #include <asm/delay.h>
 
 /*
@@ -107,23 +108,27 @@ static inline void init_pmu(void)
 {
     //*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9));
     //PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE);
-    PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
+/*    PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
     PPE_TC_PMU_SETUP(IFX_PMU_ENABLE);
     PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE);
     //PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE);
     PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE);
-    DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);
+    DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/
+       struct clk *clk = clk_get_sys("ltq_dsl", NULL);
+       clk_enable(clk);
 }
 
 static inline void uninit_pmu(void)
 {
-    PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
+/*    PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
     PPE_TC_PMU_SETUP(IFX_PMU_DISABLE);
     PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE);
     //PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE);
     PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE);
     DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);
-    //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);
+    //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);*/
+       struct clk *clk = clk_get_sys("ltq_dsl", NULL);
+       clk_disable(clk);
 }
 
 static inline void reset_ppe(void)
index 418863c5129fdea07bdc18e25f8efad41e573008..31b89f5c84f1f7f9a245e5226c9d9245dfc2f284 100644 (file)
@@ -40,6 +40,7 @@
 #include <linux/proc_fs.h>
 #include <linux/init.h>
 #include <linux/ioctl.h>
+#include <linux/clk.h>
 #include <asm/delay.h>
 
 /*
@@ -114,23 +115,27 @@ static inline void init_pmu(void)
 {
     //*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9));
     //PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE);
-    PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
+/*    PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
     PPE_TC_PMU_SETUP(IFX_PMU_ENABLE);
     PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE);
     PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE);
     PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE);
-    DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);
+    DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/
+       struct clk *clk = clk_get_sys("ltq_dsl", NULL);
+       clk_enable(clk);
 }
 
 static inline void uninit_pmu(void)
 {
-    PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
+  /*  PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
     PPE_TC_PMU_SETUP(IFX_PMU_DISABLE);
     PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE);
     PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE);
     PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE);
-    DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);
+    DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);*/
     //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);
+       struct clk *clk = clk_get_sys("ltq_dsl", NULL);
+       clk_disable(clk);
 }
 
 static inline void reset_ppe(void)
index df7801e23426b7d229e917edc1c2d78874e4df67..64698b8792413d49456974e77de7d5f73111cc92 100644 (file)
@@ -40,6 +40,7 @@
 #include <linux/proc_fs.h>
 #include <linux/init.h>
 #include <linux/ioctl.h>
+#include <linux/clk.h>
 #include <asm/delay.h>
 
 /*
@@ -109,23 +110,27 @@ static inline void init_pmu(void)
 {
     //*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9));
     //PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE);
-    PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
+/*    PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
     PPE_TC_PMU_SETUP(IFX_PMU_ENABLE);
     PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE);
     PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE);
     PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE);
-    DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);
+    DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/
+    struct clk *clk = clk_get_sys("ltq_dsl", NULL);
+    clk_enable(clk);
 }
 
 static inline void uninit_pmu(void)
 {
-    PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
+/*    PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
     PPE_TC_PMU_SETUP(IFX_PMU_DISABLE);
     PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE);
     PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE);
     PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE);
-    DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);
+    DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);*/
     //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);
+    struct clk *clk = clk_get_sys("ltq_dsl", NULL);
+    clk_disable(clk);
 }
 
 static inline void reset_ppe(void)
index bd357e98cfaec7b100b79a38e5eb649cc37a2be1..b0c9f25f487a69c1c3e004389899610df0b22d7b 100644 (file)
@@ -34,6 +34,9 @@
 #define IFX_PMU_MODULE_PPE_EMA    (1 << 22)
 #define IFX_PMU_MODULE_PPE_TOP    (1 << 29)
 
+extern void ltq_pmu_enable(unsigned int module);
+extern void ltq_pmu_disable(unsigned int module);
+
 #define ifx_pmu_set(a,b)       {if(a == IFX_PMU_ENABLE) ltq_pmu_enable(b); else ltq_pmu_disable(b);}
 
 #define PPE_TOP_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_PPE_TOP, (__x))