#include <linux/proc_fs.h>
#include <linux/init.h>
#include <linux/ioctl.h>
+#include <linux/clk.h>
#include <asm/delay.h>
/*
{
//*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9));
//PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE);
- PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
+/* PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
PPE_TC_PMU_SETUP(IFX_PMU_ENABLE);
PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE);
//PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE);
PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE);
- DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);
+ DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/
+ struct clk *clk = clk_get_sys("ltq_dsl", NULL);
+ clk_enable(clk);
}
static inline void uninit_pmu(void)
{
- PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
+/* PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
PPE_TC_PMU_SETUP(IFX_PMU_DISABLE);
PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE);
//PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE);
PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE);
DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);
- //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);
+ //PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);*/
+ struct clk *clk = clk_get_sys("ltq_dsl", NULL);
+ clk_disable(clk);
}
static inline void reset_ppe(void)
#include <linux/proc_fs.h>
#include <linux/init.h>
#include <linux/ioctl.h>
+#include <linux/clk.h>
#include <asm/delay.h>
/*
{
//*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9));
//PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE);
- PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
+/* PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
PPE_TC_PMU_SETUP(IFX_PMU_ENABLE);
PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE);
PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE);
PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE);
- DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);
+ DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/
+ struct clk *clk = clk_get_sys("ltq_dsl", NULL);
+ clk_enable(clk);
}
static inline void uninit_pmu(void)
{
- PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
+ /* PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
PPE_TC_PMU_SETUP(IFX_PMU_DISABLE);
PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE);
PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE);
PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE);
- DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);
+ DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);*/
//PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);
+ struct clk *clk = clk_get_sys("ltq_dsl", NULL);
+ clk_disable(clk);
}
static inline void reset_ppe(void)
#include <linux/proc_fs.h>
#include <linux/init.h>
#include <linux/ioctl.h>
+#include <linux/clk.h>
#include <asm/delay.h>
/*
{
//*(unsigned long *)0xBF10201C &= ~((1 << 15) | (1 << 13) | (1 << 9));
//PPE_TOP_PMU_SETUP(IFX_PMU_ENABLE);
- PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
+/* PPE_SLL01_PMU_SETUP(IFX_PMU_ENABLE);
PPE_TC_PMU_SETUP(IFX_PMU_ENABLE);
PPE_EMA_PMU_SETUP(IFX_PMU_ENABLE);
PPE_QSB_PMU_SETUP(IFX_PMU_ENABLE);
PPE_TPE_PMU_SETUP(IFX_PMU_ENABLE);
- DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);
+ DSL_DFE_PMU_SETUP(IFX_PMU_ENABLE);*/
+ struct clk *clk = clk_get_sys("ltq_dsl", NULL);
+ clk_enable(clk);
}
static inline void uninit_pmu(void)
{
- PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
+/* PPE_SLL01_PMU_SETUP(IFX_PMU_DISABLE);
PPE_TC_PMU_SETUP(IFX_PMU_DISABLE);
PPE_EMA_PMU_SETUP(IFX_PMU_DISABLE);
PPE_QSB_PMU_SETUP(IFX_PMU_DISABLE);
PPE_TPE_PMU_SETUP(IFX_PMU_DISABLE);
- DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);
+ DSL_DFE_PMU_SETUP(IFX_PMU_DISABLE);*/
//PPE_TOP_PMU_SETUP(IFX_PMU_DISABLE);
+ struct clk *clk = clk_get_sys("ltq_dsl", NULL);
+ clk_disable(clk);
}
static inline void reset_ppe(void)
#define IFX_PMU_MODULE_PPE_EMA (1 << 22)
#define IFX_PMU_MODULE_PPE_TOP (1 << 29)
+extern void ltq_pmu_enable(unsigned int module);
+extern void ltq_pmu_disable(unsigned int module);
+
#define ifx_pmu_set(a,b) {if(a == IFX_PMU_ENABLE) ltq_pmu_enable(b); else ltq_pmu_disable(b);}
#define PPE_TOP_PMU_SETUP(__x) ifx_pmu_set(IFX_PMU_MODULE_PPE_TOP, (__x))