ath79: qca95xx: add new intc2, correct intc3 and add second pcie on qca9557
authorJohann Neuhauser <johann@it-neuhauser.de>
Tue, 19 Jun 2018 06:16:28 +0000 (08:16 +0200)
committerJohn Crispin <john@phrozen.org>
Wed, 20 Jun 2018 09:12:00 +0000 (11:12 +0200)
Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
target/linux/ath79/dts/qca9557.dtsi
target/linux/ath79/dts/qca9558_openmesh_om5p-ac-v2.dts
target/linux/ath79/dts/qca956x.dtsi

index 3600d69cab417e40162b2aea96d64a2408505a01..802f2da7259be91e30d750e69e02459d627d3035 100644 (file)
                                #reset-cells = <1>;
                                interrupt-parent = <&cpuintc>;
 
+                               intc2: interrupt-controller@2 {
+                                       compatible = "qca,ar9340-intc";
+
+                                       interrupt-parent = <&cpuintc>;
+                                       interrupts = <2>;
+
+                                       interrupt-controller;
+                                       #interrupt-cells = <1>;
+
+                                       qca,int-status-addr = <0xac>;
+                                       qca,pending-bits = <0xf>,       /* wmac */
+                                                       <0x1f0>;        /* pcie rc 0 */
+                               };
+
                                intc3: interrupt-controller@3 {
-                                       compatible = "qcom,qca9556-intc";
+                                       compatible = "qca,ar9340-intc";
 
+                                       interrupt-parent = <&cpuintc>;
                                        interrupts = <3>;
 
                                        interrupt-controller;
                                        #interrupt-cells = <1>;
 
-                                       qcom,pending-bits = <0x1f000>,          /* pcie rc */
+                                       qca,int-status-addr = <0xac>;
+                                       qca,pending-bits = <0x1f000>,           /* pcie rc 1 */
                                                            <0x1000000>,        /* usb1 */
                                                            <0x10000000>;       /* usb2 */
                                };
                                #reset-cells = <1>;
                        };
 
-                       pcie: pcie-controller@18250000 {
+                       pcie0: pcie-controller@180c0000 {
+                               compatible = "qcom,ar7240-pci";
+                               #address-cells = <3>;
+                               #size-cells = <2>;
+                               bus-range = <0x0 0x0>;
+                               reg = <0x180c0000 0x1000>, /* CRP */
+                                     <0x180f0000 0x100>,  /* CTRL */
+                                     <0x14000000 0x1000>; /* CFG */
+                               reg-names = "crp_base", "ctrl_base", "cfg_base";
+                               ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000        /* pci memory */
+                                         0x1000000 0 0x00000000 0x0000000 0 0x000001>;         /* io space */
+                               interrupt-parent = <&intc2>;
+                               interrupts = <1>;
+
+                               interrupt-controller;
+                               #interrupt-cells = <1>;
+
+                               interrupt-map-mask = <0 0 0 1>;
+                               interrupt-map = <0 0 0 0 &pcie0 0>;
+                               status = "disabled";
+                       };
+
+                       pcie1: pcie-controller@18250000 {
                                compatible = "qcom,ar7240-pci";
                                #address-cells = <3>;
                                #size-cells = <2>;
                                #interrupt-cells = <1>;
 
                                interrupt-map-mask = <0 0 0 1>;
-                               interrupt-map = <0 0 0 0 &pcie 0>;
+                               interrupt-map = <0 0 0 0 &pcie1 0>;
                                status = "disabled";
                        };
 
                                compatible = "qca,qca9550-wmac";
                                reg = <0x18100000 0x10000>;
 
-                               interrupt-parent = <&cpuintc>;
-                               interrupts = <2>;
+                               interrupt-parent = <&intc2>;
+                               interrupts = <0>;
 
                                status = "disabled";
                        };
index bb529b49e05c6b1d6f8cea69793e8d312a89c4a2..974b1c61f0d501cf6dc9c5a04db21b899f8e1255 100644 (file)
@@ -90,7 +90,7 @@
        };
 };
 
-&pcie {
+&pcie0 {
        status = "okay";
 };
 
index c7b6d6e7479d78140d1986d47801f66f2d3f2b94..1b8733a5851d8c9ec83e78b4fad8fb175ae0a195 100644 (file)
                                interrupt-parent = <&cpuintc>;
 
                                intc3: interrupt-controller@3 {
-                                       compatible = "qcom,qca9556-intc";
+                                       compatible = "qca,ar9340-intc";
 
+                                       interrupt-parent = <&cpuintc>;
                                        interrupts = <3>;
 
                                        interrupt-controller;
                                        #interrupt-cells = <1>;
 
-                                       qcom,pending-bits = <0x1f000>,          /* pcie rc */
+                                       qca,int-status-addr = <0xac>;
+                                       qca,pending-bits = <0x1f000>,           /* pcie rc */
                                                            <0x1000000>,        /* usb1 */
                                                            <0x10000000>;       /* usb2 */
                                };