ARM: dts: dra7: Move cpus node to parent dts for dra74x and dra72x

Nearly all of the information in the cpus node, especially for cpu0, is
the same between dra74x and dra72x so move the common information to
the parent dra7.dtsi to avoid duplication of data.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index cc4cb76431f6cf9e304e1cdb4684f223ca894a87..b1e9f5c0fb79123dd1e117260eacaea6c700825f 100644 (file)
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -73,6 +73,33 @@
                interrupt-parent = <&gic>;
        };
 
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <0>;
+
+                       operating-points = <
+                               /* kHz    uV */
+                               1000000 1060000
+                               1176000 1160000
+                               >;
+
+                       clocks = <&dpll_mpu_ck>;
+                       clock-names = "cpu";
+
+                       clock-latency = <300000>; /* From omap-cpufreq driver */
+
+                       /* cooling options */
+                       cooling-min-level = <0>;
+                       cooling-max-level = <2>;
+                       #cooling-cells = <2>; /* min followed by max */
+               };
+       };
+
        /*
         * The soc node represents the soc top level view. It is used for IPs
         * that are not memory mapped in the MPU view or for the MPU itself.

diff --git a/arch/arm/boot/dts/dra72x.dtsi b/arch/arm/boot/dts/dra72x.dtsi
index 70a217050a4c8603b6b285ecf34be4b762b072b6..67107605fb4c1067ef131073bb94222d7ef5dc9c 100644 (file)
--- a/arch/arm/boot/dts/dra72x.dtsi
+++ b/arch/arm/boot/dts/dra72x.dtsi
@@ -12,22 +12,6 @@
 / {
        compatible = "ti,dra722", "ti,dra72", "ti,dra7";
 
-       cpus {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               cpu0: cpu@0 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <0>;
-
-                       /* cooling options */
-                       cooling-min-level = <0>;
-                       cooling-max-level = <2>;
-                       #cooling-cells = <2>; /* min followed by max */
-               };
-       };
-
        pmu {
                compatible = "arm,cortex-a15-pmu";
                interrupt-parent = <&wakeupgen>;

diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi
index 4220eeffc65ae806892f353efce4eab400a9cdb9..0c31db3a8919f8ab1be178fff22a888e28f307af 100644 (file)
--- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x.dtsi
@@ -13,30 +13,6 @@
        compatible = "ti,dra742", "ti,dra74", "ti,dra7";
 
        cpus {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               cpu0: cpu@0 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a15";
-                       reg = <0>;
-
-                       operating-points = <
-                               /* kHz    uV */
-                               1000000 1060000
-                               1176000 1160000
-                               >;
-
-                       clocks = <&dpll_mpu_ck>;
-                       clock-names = "cpu";
-
-                       clock-latency = <300000>; /* From omap-cpufreq driver */
-
-                       /* cooling options */
-                       cooling-min-level = <0>;
-                       cooling-max-level = <2>;
-                       #cooling-cells = <2>; /* min followed by max */
-               };
                cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a15";