drm/i915: Enable rc6 with bdw
authorMika Kuoppala <mika.kuoppala@linux.intel.com>
Thu, 15 May 2014 17:58:11 +0000 (20:58 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 15 May 2014 21:15:54 +0000 (23:15 +0200)
Everything should be in place so enable rc6/rps for bdw.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c

index 9ed2eb470ac95ae05370d10acf57d638c5816bf3..6e6ade902d7e323f637ef124cfa355c96267de7b 100644 (file)
@@ -3334,10 +3334,6 @@ static int sanitize_rc6_option(const struct drm_device *dev, int enable_rc6)
        if (INTEL_INFO(dev)->gen == 5 && !IS_IRONLAKE_M(dev))
                return 0;
 
-       /* Disable RC6 on Broadwell for now */
-       if (IS_BROADWELL(dev))
-               return 0;
-
        /* Respect the kernel parameter if it is set */
        if (enable_rc6 >= 0) {
                int mask;
@@ -4645,7 +4641,7 @@ void intel_disable_gt_powersave(struct drm_device *dev)
        if (IS_IRONLAKE_M(dev)) {
                ironlake_disable_drps(dev);
                ironlake_disable_rc6(dev);
-       } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
+       } else if (IS_GEN6(dev) || IS_GEN7(dev) || IS_BROADWELL(dev)) {
                cancel_delayed_work_sync(&dev_priv->rps.delayed_resume_work);
                cancel_work_sync(&dev_priv->rps.work);
                mutex_lock(&dev_priv->rps.hw_lock);
@@ -4692,7 +4688,7 @@ void intel_enable_gt_powersave(struct drm_device *dev)
                ironlake_enable_rc6(dev);
                intel_init_emon(dev);
                mutex_unlock(&dev->struct_mutex);
-       } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
+       } else if (IS_GEN6(dev) || IS_GEN7(dev) || IS_BROADWELL(dev)) {
                /*
                 * PCU communication is slow and this doesn't need to be
                 * done at any specific time, so do this out of our fast path