hang();
}
- gd->ram_size = sdram_calculate_size();
- printf("DDR: %d MiB\n", (int)(gd->ram_size >> 20));
-
- /* Sanity check ensure correct SDRAM size specified */
- debug("DDR: Running SDRAM size sanity check\n");
- if (get_ram_size(0, gd->ram_size) != gd->ram_size) {
- puts("DDR: SDRAM size check failed!\n");
- hang();
- }
- debug("DDR: SDRAM size check passed!\n");
-
mbox_init();
#ifdef CONFIG_CADENCE_QSPI
SYSMGR_HMC_CLK_STATUS_MSK, true, 1000, false);
}
+static void sdram_size_check(void)
+{
+ /* Sanity check ensure correct SDRAM size specified */
+ debug("DDR: Running SDRAM size sanity check\n");
+ if (get_ram_size(0, gd->ram_size) != gd->ram_size) {
+ puts("DDR: SDRAM size check failed!\n");
+ hang();
+ }
+ debug("DDR: SDRAM size check passed!\n");
+}
+
/**
* sdram_mmr_init_full() - Function to initialize SDRAM MMR
*
else
gd->ram_size = size;
+ printf("DDR: %lld MiB\n", gd->ram_size >> 20);
+
/* Enable or disable the SDRAM ECC */
if (CTRLCFG1_CFG_CTRL_EN_ECC(ctrlcfg1)) {
setbits_le32(SOCFPGA_SDR_ADDRESS + ECCCTRL1,
DDR_HMC_ECCCTL2_AWB_EN_SET_MSK));
}
+ sdram_size_check();
+
debug("DDR: HMC init success\n");
return 0;
}