drivers: Add Cadence UART driver

Add a driver for the Cadence UART which is found in Xilinx Zynq SOCs.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

diff --git a/drivers/cadence/uart/cdns_console.S b/drivers/cadence/uart/cdns_console.S
new file mode 100644 (file)
index 0000000..2c7960d
--- /dev/null
+++ b/drivers/cadence/uart/cdns_console.S
@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch.h>
+#include <asm_macros.S>
+#include <cadence/cdns_uart.h>
+
+        .globl  console_core_init
+        .globl  console_core_putc
+        .globl  console_core_getc
+
+       /* -----------------------------------------------
+        * int console_core_init(unsigned long base_addr,
+        * unsigned int uart_clk, unsigned int baud_rate)
+        * Function to initialize the console without a
+        * C Runtime to print debug information. This
+        * function will be accessed by console_init and
+        * crash reporting.
+        * We assume that the bootloader already set up
+        * the HW (baud, ...) and only enable the trans-
+        * mitter and receiver here.
+        * In: x0 - console base address
+        *     w1 - Uart clock in Hz
+        *     w2 - Baud rate
+        * Out: return 1 on success else 0 on error
+        * Clobber list : x1, x2, x3
+        * -----------------------------------------------
+        */
+func console_core_init
+       /* Check the input base address */
+       cbz     x0, core_init_fail
+       /* Check baud rate and uart clock for sanity */
+       cbz     w1, core_init_fail
+       cbz     w2, core_init_fail
+
+       /* RX/TX enabled & reset */
+       mov     w3, #(R_UART_CR_TX_EN | R_UART_CR_RX_EN | R_UART_CR_TXRST | R_UART_CR_RXRST)
+       str     w3, [x0, #R_UART_CR]
+
+       mov     w0, #1
+       ret
+core_init_fail:
+       mov     w0, wzr
+       ret
+endfunc console_core_init
+
+       /* --------------------------------------------------------
+        * int console_core_putc(int c, unsigned long base_addr)
+        * Function to output a character over the console. It
+        * returns the character printed on success or -1 on error.
+        * In : w0 - character to be printed
+        *      x1 - console base address
+        * Out : return -1 on error else return character.
+        * Clobber list : x2
+        * --------------------------------------------------------
+        */
+func console_core_putc
+       /* Check the input parameter */
+       cbz     x1, putc_error
+       /* Prepend '\r' to '\n' */
+       cmp     w0, #0xA
+       b.ne    2f
+1:
+       /* Check if the transmit FIFO is full */
+       ldr     w2, [x1, #R_UART_SR]
+       tbnz    w2, #UART_SR_INTR_TFUL_BIT, 1b
+       mov     w2, #0xD
+       str     w2, [x1, #R_UART_TX]
+2:
+       /* Check if the transmit FIFO is full */
+       ldr     w2, [x1, #R_UART_SR]
+       tbnz    w2, #UART_SR_INTR_TFUL_BIT, 2b
+       str     w0, [x1, #R_UART_TX]
+       ret
+putc_error:
+       mov     w0, #-1
+       ret
+endfunc console_core_putc
+
+       /* ---------------------------------------------
+        * int console_core_getc(unsigned long base_addr)
+        * Function to get a character from the console.
+        * It returns the character grabbed on success
+        * or -1 on error.
+        * In : x0 - console base address
+        * Clobber list : x0, x1
+        * ---------------------------------------------
+        */
+func console_core_getc
+       cbz     x0, getc_error
+1:
+       /* Check if the receive FIFO is empty */
+       ldr     w1, [x0, #R_UART_SR]
+       tbnz    w1, #UART_SR_INTR_REMPTY_BIT, 1b
+       ldr     w1, [x0, #R_UART_RX]
+       mov     w0, w1
+       ret
+getc_error:
+       mov     w0, #-1
+       ret
+endfunc console_core_getc

diff --git a/include/drivers/cadence/cdns_uart.h b/include/drivers/cadence/cdns_uart.h
new file mode 100644 (file)
index 0000000..bc1cc90
--- /dev/null
+++ b/include/drivers/cadence/cdns_uart.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __CADENCE_UART_H__
+#define __CADENCE_UART_H__
+
+/* This is very minimalistic and will only work in QEMU.  */
+
+/* CADENCE Registers */
+#define R_UART_CR      0
+#define R_UART_CR_RXRST        (1 << 0) /* RX logic reset */
+#define R_UART_CR_TXRST        (1 << 1) /* TX logic reset */
+#define R_UART_CR_RX_EN        (1 << 2) /* RX enabled */
+#define R_UART_CR_TX_EN        (1 << 4) /* TX enabled */
+
+#define R_UART_SR              0x2C
+#define UART_SR_INTR_REMPTY_BIT        1
+#define UART_SR_INTR_TFUL_BIT  4
+
+#define R_UART_TX      0x30
+#define R_UART_RX      0x30
+
+#endif