Revert "drm/amd/display: navi10 bring up skip dsc encoder config"

This reverts commit ec8763486dd3d2fb585c2e6747520406e7dcef98.

Re-enable enc2_dp_set_dsc_config. This function caused warnings
due to missing register definitions. With the registers added,
this now works

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
index aab0d21459bc04d2c89e77fc38f3e6df320a6bf2..c8ca49656d8d2e8151f4452b0ce4ef6e108683f0 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
@@ -279,14 +279,6 @@ static void enc2_dp_set_dsc_config(struct stream_encoder *enc,
                                        uint32_t dsc_slice_width)
 {
        struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
-       uint32_t dsc_value = 0;
-
-       dsc_value = REG_READ(DP_DSC_CNTL);
-
-       /* dsc disable skip */
-       if ((dsc_value & 0x3) == 0x0)
-               return;
-
 
        REG_UPDATE_2(DP_DSC_CNTL,
                        DP_DSC_MODE, dsc_mode,