--- /dev/null
+# CONFIG_4KSTACKS is not set
+# CONFIG_60XX_WDT is not set
+# CONFIG_64BIT is not set
+# CONFIG_ACQUIRE_WDT is not set
+# CONFIG_ADVANTECH_WDT is not set
+# CONFIG_ALIM1535_WDT is not set
+CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig"
+CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
+CONFIG_ARCH_HAS_CPU_RELAX=y
+CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_WANT_FRAME_POINTERS=y
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+# CONFIG_ARPD is not set
+# CONFIG_AUDIT_ARCH is not set
+# CONFIG_BASE_FULL is not set
+CONFIG_BASE_SMALL=1
+CONFIG_BITREVERSE=y
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BOUNCE=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_CC_STACKPROTECTOR is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
+CONFIG_CLOCKSOURCE_WATCHDOG=y
+CONFIG_CMDLINE="console=ttyS0,38400 rootfstype=squashfs,jffs2"
+CONFIG_CMDLINE_BOOL=y
+# CONFIG_CMDLINE_OVERRIDE is not set
+# CONFIG_COMPAT_VDSO is not set
+# CONFIG_CPU5_WDT is not set
+# CONFIG_CPU_SUP_AMD is not set
+# CONFIG_CPU_SUP_CENTAUR is not set
+# CONFIG_CPU_SUP_CYRIX_32 is not set
+# CONFIG_CPU_SUP_INTEL is not set
+# CONFIG_CPU_SUP_TRANSMETA_32 is not set
+# CONFIG_CPU_SUP_UMC_32 is not set
+# CONFIG_CS5535_GPIO is not set
+# CONFIG_DCDBAS is not set
+# CONFIG_DEBUG_FS is not set
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DEFAULT_IO_DELAY_TYPE=0
+# CONFIG_DELL_RBU is not set
+CONFIG_DEVPORT=y
+# CONFIG_DMI is not set
+CONFIG_DOUBLEFAULT=y
+# CONFIG_EARLY_PRINTK is not set
+# CONFIG_EDD is not set
+# CONFIG_EUROTECH_WDT is not set
+# CONFIG_FIRMWARE_MEMMAP is not set
+CONFIG_FIX_EARLYCON_MEM=y
+# CONFIG_FRAME_POINTER is not set
+# CONFIG_FSNOTIFY is not set
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+# CONFIG_GENERIC_CPU is not set
+CONFIG_GENERIC_FIND_FIRST_BIT=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IOMAP=y
+CONFIG_GENERIC_ISA_DMA=y
+# CONFIG_GENERIC_TIME_VSYSCALL is not set
+# CONFIG_GEN_RTC is not set
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+# CONFIG_HAMRADIO is not set
+# CONFIG_HANGCHECK_TIMER is not set
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAVE_AOUT=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_KMEMCHECK=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_ATOMIC_IOMAP=y
+# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_ATTRS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_KVM=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_HAVE_MMIOTRACE_SUPPORT=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_SETUP_PER_CPU_AREA=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
+# CONFIG_HIGHMEM4G is not set
+# CONFIG_HIGHMEM64G is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+# CONFIG_HPET_TIMER is not set
+# CONFIG_HP_WATCHDOG is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HW_RANDOM is not set
+CONFIG_HZ=250
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_I6300ESB_WDT is not set
+# CONFIG_I8K is not set
+# CONFIG_IB700_WDT is not set
+# CONFIG_IBMASR is not set
+# CONFIG_IOMMU_API is not set
+# CONFIG_IOMMU_HELPER is not set
+# CONFIG_IOMMU_STRESS is not set
+CONFIG_IO_DELAY_0X80=y
+# CONFIG_IO_DELAY_0XED is not set
+# CONFIG_IO_DELAY_NONE is not set
+CONFIG_IO_DELAY_TYPE_0X80=0
+CONFIG_IO_DELAY_TYPE_0XED=1
+CONFIG_IO_DELAY_TYPE_NONE=3
+CONFIG_IO_DELAY_TYPE_UDELAY=2
+# CONFIG_IO_DELAY_UDELAY is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ISA is not set
+CONFIG_ISA_DMA_API=y
+# CONFIG_ISCSI_IBFT_FIND is not set
+# CONFIG_IT8712F_WDT is not set
+# CONFIG_IT87_WDT is not set
+# CONFIG_ITCO_WDT is not set
+# CONFIG_JFFS2_SUMMARY is not set
+CONFIG_KTIME_SCALAR=y
+# CONFIG_LEDS_ALIX2 is not set
+CONFIG_LEDS_GPIO=y
+# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
+# CONFIG_LEDS_TRIGGER_NETDEV is not set
+# CONFIG_LEDS_TRIGGER_TIMER is not set
+# CONFIG_M386 is not set
+CONFIG_M486=y
+# CONFIG_M586 is not set
+# CONFIG_M586MMX is not set
+# CONFIG_M586TSC is not set
+# CONFIG_M686 is not set
+# CONFIG_MACHZ_WDT is not set
+CONFIG_MATH_EMULATION=y
+# CONFIG_MATOM is not set
+# CONFIG_MCA is not set
+# CONFIG_MCORE2 is not set
+# CONFIG_MCRUSOE is not set
+# CONFIG_MCYRIXIII is not set
+# CONFIG_MEFFICEON is not set
+# CONFIG_MEMTEST is not set
+# CONFIG_MGEODEGX1 is not set
+# CONFIG_MGEODE_LX is not set
+# CONFIG_MICROCODE is not set
+# CONFIG_MK6 is not set
+# CONFIG_MK7 is not set
+# CONFIG_MK8 is not set
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MPENTIUM4 is not set
+# CONFIG_MPENTIUMII is not set
+# CONFIG_MPENTIUMIII is not set
+# CONFIG_MPENTIUMM is not set
+# CONFIG_MPSC is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_NETSC520 is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_R8610 is not set
+# CONFIG_MTD_RDC3210 is not set
+# CONFIG_MTD_TS5500 is not set
+# CONFIG_MTRR is not set
+# CONFIG_MVIAC3_2 is not set
+# CONFIG_MVIAC7 is not set
+# CONFIG_MWINCHIP3D is not set
+# CONFIG_MWINCHIPC6 is not set
+CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
+CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
+# CONFIG_NETDEV_1000 is not set
+CONFIG_NOHIGHMEM=y
+CONFIG_NR_CPUS=1
+# CONFIG_NSC_GPIO is not set
+# CONFIG_OLPC is not set
+# CONFIG_OPTIMIZE_INLINING is not set
+CONFIG_OUTPUT_FORMAT="elf32-i386"
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PARAVIRT_GUEST is not set
+# CONFIG_PC8736x_GPIO is not set
+# CONFIG_PC87413_WDT is not set
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_PCI_BIOS=y
+CONFIG_PCI_DIRECT=y
+CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_GOANY=y
+# CONFIG_PCI_GOBIOS is not set
+# CONFIG_PCI_GODIRECT is not set
+# CONFIG_PCI_GOMMCONFIG is not set
+# CONFIG_PCI_GOOLPC is not set
+# CONFIG_PCI_QUIRKS is not set
+CONFIG_PHYSICAL_ALIGN=0x100000
+CONFIG_PHYSICAL_START=0x100000
+CONFIG_PROCESSOR_SELECT=y
+# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set
+CONFIG_RDC321X_WDT=m
+# CONFIG_RELOCATABLE is not set
+# CONFIG_RTC is not set
+# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+# CONFIG_SBC7240_WDT is not set
+# CONFIG_SBC8360_WDT is not set
+# CONFIG_SBC_EPX_C3_WATCHDOG is not set
+# CONFIG_SC1200_WDT is not set
+# CONFIG_SC520_WDT is not set
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCx200 is not set
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_SHMEM is not set
+# CONFIG_SMSC37B787_WDT is not set
+# CONFIG_SMSC_SCH311X_WDT is not set
+CONFIG_SPARSEMEM_STATIC=y
+# CONFIG_STRICT_DEVMEM is not set
+# CONFIG_TELCLOCK is not set
+# CONFIG_TOSHIBA is not set
+# CONFIG_TREE_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+CONFIG_UID16=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USER_STACKTRACE_SUPPORT=y
+# CONFIG_VM86 is not set
+# CONFIG_W83697UG_WDT is not set
+# CONFIG_WAFER_WDT is not set
+CONFIG_X86=y
+CONFIG_X86_32=y
+CONFIG_X86_32_LAZY_GS=y
+# CONFIG_X86_64 is not set
+CONFIG_X86_ALIGNMENT_16=y
+CONFIG_X86_BSWAP=y
+# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set
+CONFIG_X86_CMPXCHG=y
+CONFIG_X86_CPU=y
+# CONFIG_X86_CPUID is not set
+# CONFIG_X86_ELAN is not set
+CONFIG_X86_EXTENDED_PLATFORM=y
+CONFIG_X86_F00F_BUG=y
+# CONFIG_X86_GENERIC is not set
+CONFIG_X86_INTERNODE_CACHE_BYTES=64
+CONFIG_X86_INVLPG=y
+CONFIG_X86_L1_CACHE_BYTES=64
+CONFIG_X86_L1_CACHE_SHIFT=4
+# CONFIG_X86_MCE is not set
+CONFIG_X86_MINIMUM_CPU_FAMILY=4
+# CONFIG_X86_MRST is not set
+# CONFIG_X86_MSR is not set
+# CONFIG_X86_PAE is not set
+# CONFIG_X86_PLATFORM_DEVICES is not set
+CONFIG_X86_POPAD_OK=y
+# CONFIG_X86_PPRO_FENCE is not set
+CONFIG_X86_RDC321X=y
+CONFIG_X86_REBOOTFIXUPS=y
+# CONFIG_X86_RESERVE_LOW_64K is not set
+# CONFIG_X86_UP_APIC is not set
+# CONFIG_X86_VERBOSE_BOOTUP is not set
+CONFIG_X86_WP_WORKS_OK=y
+CONFIG_X86_XADD=y
+# CONFIG_ZONE_DMA32 is not set
--- /dev/null
+#ifndef _ASM_X86_MACH_RDC321X_GPIO_H
+#define _ASM_X86_MACH_RDC321X_GPIO_H
+
+#include <linux/kernel.h>
+
+#define gpio_to_irq(gpio) NULL
+
+#define gpio_get_value __gpio_get_value
+#define gpio_set_value __gpio_set_value
+
+#define gpio_cansleep __gpio_cansleep
+
+/* For cansleep */
+#include <asm-generic/gpio.h>
+
+#endif /* _ASM_X86_MACH_RDC321X_GPIO_H */
--- /dev/null
+#
+# Makefile for the RDC321x specific parts of the kernel
+#
+obj-$(CONFIG_X86_RDC321X) := gpio.o platform.o
+
--- /dev/null
+/*
+ * GPIO support for RDC SoC R3210/R8610
+ *
+ * Copyright (C) 2007, Florian Fainelli <florian@openwrt.org>
+ * Copyright (C) 2008, Volker Weiss <dev@tintuc.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/gpio.h>
+
+#include <asm/rdc321x_gpio.h>
+#include <asm/rdc321x_defs.h>
+
+
+/* spin lock to protect our private copy of GPIO data register plus
+ the access to PCI conf registers. */
+static DEFINE_SPINLOCK(gpio_lock);
+
+/* copy of GPIO data registers */
+static u32 gpio_data_reg1;
+static u32 gpio_data_reg2;
+
+static inline void rdc321x_conf_write(unsigned addr, u32 value)
+{
+ outl((1 << 31) | (7 << 11) | addr, RDC3210_CFGREG_ADDR);
+ outl(value, RDC3210_CFGREG_DATA);
+}
+
+static inline void rdc321x_conf_or(unsigned addr, u32 value)
+{
+ outl((1 << 31) | (7 << 11) | addr, RDC3210_CFGREG_ADDR);
+ value |= inl(RDC3210_CFGREG_DATA);
+ outl(value, RDC3210_CFGREG_DATA);
+}
+
+static inline u32 rdc321x_conf_read(unsigned addr)
+{
+ outl((1 << 31) | (7 << 11) | addr, RDC3210_CFGREG_ADDR);
+
+ return inl(RDC3210_CFGREG_DATA);
+}
+
+/* configure pin as GPIO */
+static void rdc321x_configure_gpio(unsigned gpio)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpio_lock, flags);
+ rdc321x_conf_or(gpio < 32
+ ? RDC321X_GPIO_CTRL_REG1 : RDC321X_GPIO_CTRL_REG2,
+ 1 << (gpio & 0x1f));
+ spin_unlock_irqrestore(&gpio_lock, flags);
+}
+
+/* read GPIO pin */
+static int rdc_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
+{
+ u32 reg;
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpio_lock, flags);
+ reg = rdc321x_conf_read(gpio < 32
+ ? RDC321X_GPIO_DATA_REG1 : RDC321X_GPIO_DATA_REG2);
+ spin_unlock_irqrestore(&gpio_lock, flags);
+
+ return (1 << (gpio & 0x1f)) & reg ? 1 : 0;
+}
+
+/* set GPIO pin to value */
+static void rdc_gpio_set_value(struct gpio_chip *chip,
+ unsigned gpio, int value)
+{
+ unsigned long flags;
+ u32 reg;
+
+ reg = 1 << (gpio & 0x1f);
+ if (gpio < 32) {
+ spin_lock_irqsave(&gpio_lock, flags);
+ if (value)
+ gpio_data_reg1 |= reg;
+ else
+ gpio_data_reg1 &= ~reg;
+ rdc321x_conf_write(RDC321X_GPIO_DATA_REG1, gpio_data_reg1);
+ spin_unlock_irqrestore(&gpio_lock, flags);
+ } else {
+ spin_lock_irqsave(&gpio_lock, flags);
+ if (value)
+ gpio_data_reg2 |= reg;
+ else
+ gpio_data_reg2 &= ~reg;
+ rdc321x_conf_write(RDC321X_GPIO_DATA_REG2, gpio_data_reg2);
+ spin_unlock_irqrestore(&gpio_lock, flags);
+ }
+}
+
+/* configure GPIO pin as input */
+static int rdc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
+{
+ rdc321x_configure_gpio(gpio);
+
+ return 0;
+}
+
+/* configure GPIO pin as output and set value */
+static int rdc_gpio_direction_output(struct gpio_chip *chip,
+ unsigned gpio, int value)
+{
+ rdc321x_configure_gpio(gpio);
+ gpio_set_value(gpio, value);
+
+ return 0;
+}
+
+static struct gpio_chip rdc321x_gpio_chip = {
+ .label = "rdc321x-gpio",
+ .direction_input = rdc_gpio_direction_input,
+ .direction_output = rdc_gpio_direction_output,
+ .get = rdc_gpio_get_value,
+ .set = rdc_gpio_set_value,
+ .base = 0,
+ .ngpio = RDC321X_MAX_GPIO,
+};
+
+/* initially setup the 2 copies of the gpio data registers.
+ This function is called before the platform setup code. */
+static int __init rdc321x_gpio_setup(void)
+{
+ /* this might not be, what others (BIOS, bootloader, etc.)
+ wrote to these registers before, but it's a good guess. Still
+ better than just using 0xffffffff. */
+
+ gpio_data_reg1 = rdc321x_conf_read(RDC321X_GPIO_DATA_REG1);
+ gpio_data_reg2 = rdc321x_conf_read(RDC321X_GPIO_DATA_REG2);
+
+ printk(KERN_INFO "rdc321x: registering %d GPIOs\n", rdc321x_gpio_chip.ngpio);
+ return gpiochip_add(&rdc321x_gpio_chip);
+}
+
+arch_initcall(rdc321x_gpio_setup);
--- /dev/null
+/*
+ * Generic RDC321x platform devices
+ *
+ * Copyright (C) 2007-2009 OpenWrt.org
+ * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
+ * Copyright (C) 2008-2009 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/version.h>
+#include <linux/leds.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/physmap.h>
+#include <linux/root_dev.h>
+
+#include <asm/rdc321x_gpio.h>
+
+/* Flash */
+#ifdef CONFIG_MTD_R8610
+#define CONFIG_MTD_RDC3210 1
+#elif defined CONFIG_MTD_RDC3210
+static struct resource rdc_flash_resource[] = {
+ [0] = {
+ .start = (u32)-CONFIG_MTD_RDC3210_SIZE,
+ .end = (u32)-1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device rdc_flash_device = {
+ .name = "rdc321x-flash",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(rdc_flash_resource),
+ .resource = rdc_flash_resource,
+};
+#else
+static struct mtd_partition rdc_flash_parts[15];
+
+static struct resource rdc_flash_resource = {
+ .end = (u32)-1,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct physmap_flash_data rdc_flash_data = {
+ .parts = rdc_flash_parts,
+};
+
+static struct platform_device rdc_flash_device = {
+ .name = "physmap-flash",
+ .id = -1,
+ .resource = &rdc_flash_resource,
+ .num_resources = 1,
+ .dev.platform_data = &rdc_flash_data,
+};
+#endif
+
+/* LEDS */
+static struct gpio_led default_leds[] = {
+ { .name = "rdc321x:dmz", .gpio = 1, .active_low = 1},
+};
+
+static struct gpio_led_platform_data rdc321x_led_data = {
+ .num_leds = ARRAY_SIZE(default_leds),
+ .leds = default_leds,
+};
+
+static struct platform_device rdc321x_leds = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &rdc321x_led_data,
+ }
+};
+
+/* Watchdog */
+static struct platform_device rdc321x_wdt = {
+ .name = "rdc321x-wdt",
+ .id = -1,
+ .num_resources = 0,
+};
+
+/* Button */
+static struct gpio_keys_button rdc321x_gpio_btn[] = {
+ {
+ .gpio = 0,
+ .code = BTN_0,
+ .desc = "Reset",
+ .active_low = 1,
+ }
+};
+
+static struct gpio_keys_platform_data rdc321x_gpio_btn_data = {
+ .buttons = rdc321x_gpio_btn,
+ .nbuttons = ARRAY_SIZE(rdc321x_gpio_btn),
+};
+
+static struct platform_device rdc321x_button = {
+ .name = "gpio-keys",
+ .id = -1,
+ .dev = {
+ .platform_data = &rdc321x_gpio_btn_data,
+ }
+};
+
+static struct platform_device *rdc321x_devs[] = {
+ &rdc_flash_device,
+ &rdc321x_leds,
+ &rdc321x_wdt,
+ &rdc321x_button,
+};
+
+static int probe_flash_start(struct map_info *the_map)
+{
+ struct mtd_info *res;
+
+ the_map->virt = ioremap(the_map->phys, the_map->size);
+ if (the_map->virt == NULL)
+ return 1;
+ for (the_map->bankwidth = 32; the_map->bankwidth; the_map->bankwidth
+ >>= 1) {
+ res = do_map_probe("cfi_probe", the_map);
+ if (res == NULL)
+ res = do_map_probe("jedec_probe", the_map);
+ if (res != NULL)
+ break;
+ }
+ iounmap(the_map->virt);
+ if (res != NULL)
+ the_map->phys = (u32)-(s32)(the_map->size = res->size);
+ return res == NULL;
+}
+
+static int __init rdc_board_setup(void)
+{
+#ifndef CONFIG_MTD_RDC3210
+ struct map_info rdc_map_info;
+ u32 the_header[8];
+
+ ROOT_DEV = 0;
+ rdc_map_info.name = rdc_flash_device.name;
+ rdc_map_info.size = 0x800000; //8MB
+ rdc_map_info.phys = (u32) -rdc_map_info.size;
+ rdc_map_info.bankwidth = 2;
+ rdc_map_info.set_vpp = NULL;
+ simple_map_init(&rdc_map_info);
+ while (probe_flash_start(&rdc_map_info)) {
+ if (rdc_map_info.size /= 2 < 0x100000) //1MB
+ panic("Could not find start of flash!");
+ rdc_map_info.phys = (u32) -rdc_map_info.size;
+ }
+ rdc_flash_resource.start = rdc_map_info.phys;
+ rdc_flash_data.width = rdc_map_info.bankwidth;
+ rdc_map_info.virt = ioremap_nocache(rdc_map_info.phys, 0x10);
+ if (rdc_map_info.virt == NULL)
+ panic("Could not ioremap to read device magic!");
+ the_header[0] = ((u32 *)rdc_map_info.virt)[0];
+ the_header[1] = ((u32 *)rdc_map_info.virt)[1];
+ the_header[2] = ((u32 *)rdc_map_info.virt)[2];
+ the_header[3] = ((u32 *)rdc_map_info.virt)[3];
+ iounmap(rdc_map_info.virt);
+ rdc_map_info.virt = ioremap_nocache(rdc_map_info.phys + 0x8000, 0x10);
+ if (rdc_map_info.virt == NULL)
+ panic("Could not ioremap to read device magic!");
+ the_header[4] = ((u32 *)rdc_map_info.virt)[0];
+ the_header[5] = ((u32 *)rdc_map_info.virt)[1];
+ the_header[6] = ((u32 *)rdc_map_info.virt)[2];
+ the_header[7] = ((u32 *)rdc_map_info.virt)[3];
+ iounmap(rdc_map_info.virt);
+ if (!memcmp(the_header, "GMTK", 4)) { /* Gemtek */
+ /* TODO */
+ } else if (!memcmp(the_header + 4, "CSYS", 4)) { /* Sitecom */
+ rdc_flash_parts[0].name = "system";
+ rdc_flash_parts[0].offset = 0;
+ rdc_flash_parts[0].size = rdc_map_info.size - 0x10000;
+ rdc_flash_parts[1].name = "config";
+ rdc_flash_parts[1].offset = 0;
+ rdc_flash_parts[1].size = 0x8000;
+ rdc_flash_parts[2].name = "magic";
+ rdc_flash_parts[2].offset = 0x8000;
+ rdc_flash_parts[2].size = 0x14;
+ rdc_flash_parts[3].name = "kernel";
+ rdc_flash_parts[3].offset = 0x8014;
+ rdc_flash_parts[3].size = the_header[5];
+ rdc_flash_parts[4].name = "rootfs";
+ rdc_flash_parts[4].offset = 0x8014 + the_header[5];
+ rdc_flash_parts[4].size = rdc_flash_parts[0].size - rdc_flash_parts[4].offset;
+ rdc_flash_parts[5].name = "bootloader";
+ rdc_flash_parts[5].offset = rdc_flash_parts[0].size;
+ rdc_flash_parts[5].size = 0x10000;
+ rdc_flash_data.nr_parts = 6;
+ } else if (!memcmp(((u8 *)the_header) + 14, "Li", 2)) { /* AMIT */
+ rdc_flash_parts[0].name = "kernel_parthdr";
+ rdc_flash_parts[0].offset = 0;
+ rdc_flash_parts[0].size = 0x10;
+ rdc_flash_parts[1].name = "kernel";
+ rdc_flash_parts[1].offset = 0x10;
+ rdc_flash_parts[1].size = 0xffff0;
+ rdc_flash_parts[2].name = "rootfs_parthdr";
+ rdc_flash_parts[2].offset = 0x100000;
+ rdc_flash_parts[2].size = 0x10;
+ rdc_flash_parts[3].name = "rootfs";
+ rdc_flash_parts[3].offset = 0x100010;
+ rdc_flash_parts[3].size = rdc_map_info.size - 0x160010;
+ rdc_flash_parts[4].name = "config_parthdr";
+ rdc_flash_parts[4].offset = rdc_map_info.size - 0x60000;
+ rdc_flash_parts[4].size = 0x10;
+ rdc_flash_parts[5].name = "config";
+ rdc_flash_parts[5].offset = rdc_map_info.size - 0x5fff0;
+ rdc_flash_parts[5].size = 0xfff0;
+ rdc_flash_parts[6].name = "recoveryfs_parthdr";
+ rdc_flash_parts[6].offset = rdc_map_info.size - 0x50000;
+ rdc_flash_parts[6].size = 0x10;
+ rdc_flash_parts[7].name = "recoveryfs";
+ rdc_flash_parts[7].offset = rdc_map_info.size - 0x4fff0;
+ rdc_flash_parts[7].size = 0x3fff0;
+ rdc_flash_parts[8].name = "recovery_parthdr";
+ rdc_flash_parts[8].offset = rdc_map_info.size - 0x10000;
+ rdc_flash_parts[8].size = 0x10;
+ rdc_flash_parts[9].name = "recovery";
+ rdc_flash_parts[9].offset = rdc_map_info.size - 0xfff0;
+ rdc_flash_parts[9].size = 0x7ff0;
+ rdc_flash_parts[10].name = "productinfo_parthdr";
+ rdc_flash_parts[10].offset = rdc_map_info.size - 0x8000;
+ rdc_flash_parts[10].size = 0x10;
+ rdc_flash_parts[11].name = "productinfo";
+ rdc_flash_parts[11].offset = rdc_map_info.size - 0x7ff0;
+ rdc_flash_parts[11].size = 0x1ff0;
+ rdc_flash_parts[12].name = "bootloader_parthdr";
+ rdc_flash_parts[12].offset = rdc_map_info.size - 0x6000;
+ rdc_flash_parts[12].size = 0x10;
+ rdc_flash_parts[13].name = "bootloader";
+ rdc_flash_parts[13].offset = rdc_map_info.size - 0x5ff0;
+ rdc_flash_parts[13].size = 0x5ff0;
+ rdc_flash_parts[14].name = "everything";
+ rdc_flash_parts[14].offset = 0;
+ rdc_flash_parts[14].size = rdc_map_info.size;
+ rdc_flash_data.nr_parts = 15;
+ } else { /* ZyXEL */
+ rdc_flash_parts[0].name = "kernel";
+ rdc_flash_parts[0].offset = 0;
+ rdc_flash_parts[0].size = 0x100000;
+ rdc_flash_parts[1].name = "rootfs";
+ rdc_flash_parts[1].offset = 0x100000;
+ rdc_flash_parts[1].size = rdc_map_info.size - 0x140000;
+ rdc_flash_parts[2].name = "linux";
+ rdc_flash_parts[2].offset = 0;
+ rdc_flash_parts[2].size = rdc_map_info.size - 0x40000;
+ rdc_flash_parts[3].name = "config";
+ rdc_flash_parts[3].offset = rdc_map_info.size - 0x40000;
+ rdc_flash_parts[3].size = 0x10000;
+ rdc_flash_parts[4].name = "productinfo";
+ rdc_flash_parts[4].offset = rdc_map_info.size - 0x30000;
+ rdc_flash_parts[4].size = 0x10000;
+ rdc_flash_parts[5].name = "bootloader";
+ rdc_flash_parts[5].offset = rdc_map_info.size - 0x20000;
+ rdc_flash_parts[5].size = 0x20000;
+ rdc_flash_data.nr_parts = 6;
+ }
+#endif
+ return platform_add_devices(rdc321x_devs, ARRAY_SIZE(rdc321x_devs));
+}
+
+#ifdef CONFIG_MTD_RDC3210
+arch_initcall(rdc_board_setup);
+#else
+late_initcall(rdc_board_setup);
+#endif
--- /dev/null
+--- a/drivers/mtd/maps/Kconfig
++++ b/drivers/mtd/maps/Kconfig
+@@ -114,6 +114,50 @@ config MTD_SUN_UFLASH
+ Sun Microsystems boardsets. This driver will require CFI support
+ in the kernel, so if you did not enable CFI previously, do that now.
+
++config MTD_RDC3210
++ tristate "CFI Flash device mapped on RDC3210"
++ depends on X86 && MTD_CFI && MTD_PARTITIONS
++ help
++ RDC-3210 is the flash device we find on Ralink reference board.
++
++config MTD_RDC3210_STATIC_MAP
++ bool "Partitions on RDC3210 mapped statically" if MTD_RDC3210
++ select MTD_RDC3210_FACTORY_PRESENT
++ help
++ The mapping driver will use the static partition map for the
++ RDC-3210 flash device.
++
++config MTD_RDC3210_FACTORY_PRESENT
++ bool "Reserve a partition on RDC3210 for factory presets"
++ depends on MTD_RDC3210
++ default y
++ help
++ The mapping driver will reserve a partition on the RDC-3210 flash
++ device for resetting flash contents to factory defaults.
++
++config MTD_RDC3210_ALLOW_JFFS2
++ bool "JFFS2 filesystem usable in a partition on RDC3210"
++ depends on MTD_RDC3210 && !MTD_RDC3210_STATIC_MAP
++ help
++ The mapping driver will align a partition on the RDC-3210 flash
++ device to an erase-block boundary so that a JFFS2 filesystem may
++ reside on it.
++
++config MTD_RDC3210_SIZE
++ hex "Amount of flash memory on RDC3210"
++ depends on MTD_RDC3210
++ default "0x400000"
++ help
++ Total size in bytes of the RDC-3210 flash device
++
++config MTD_RDC3210_BUSWIDTH
++ int "Width of CFI Flash device mapped on RDC3210"
++ depends on MTD_RDC3210
++ default "2"
++ help
++ Number of bytes addressed on the RDC-3210 flash device before
++ addressing the same chip again
++
+ config MTD_SC520CDP
+ tristate "CFI Flash device mapped on AMD SC520 CDP"
+ depends on X86 && MTD_CFI && MTD_CONCAT
+--- a/drivers/mtd/maps/Makefile
++++ b/drivers/mtd/maps/Makefile
+@@ -26,6 +26,7 @@ obj-$(CONFIG_MTD_PHYSMAP) += physmap.o
+ obj-$(CONFIG_MTD_PHYSMAP_OF) += physmap_of.o
+ obj-$(CONFIG_MTD_PMC_MSP_EVM) += pmcmsp-flash.o
+ obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o
++obj-$(CONFIG_MTD_RDC3210) += rdc3210.o
+ obj-$(CONFIG_MTD_RPXLITE) += rpxlite.o
+ obj-$(CONFIG_MTD_TQM8XXL) += tqm8xxl.o
+ obj-$(CONFIG_MTD_SA1100) += sa1100-flash.o
--- /dev/null
+--- a/arch/x86/Makefile
++++ b/arch/x86/Makefile
+@@ -125,6 +125,9 @@ libs-y += arch/x86/lib/
+ # See arch/x86/Kbuild for content of core part of the kernel
+ core-y += arch/x86/
+
++# RDC R-321X support
++core-$(CONFIG_X86_RDC321X) += arch/x86/mach-rdc321x/
++
+ # drivers-y are linked after core-y
+ drivers-$(CONFIG_MATH_EMULATION) += arch/x86/math-emu/
+ drivers-$(CONFIG_PCI) += arch/x86/pci/
--- /dev/null
+--- a/drivers/pcmcia/yenta_socket.c
++++ b/drivers/pcmcia/yenta_socket.c
+@@ -1174,6 +1174,17 @@ static int __devinit yenta_probe (struct
+
+ /* We must finish initialization here */
+
++#ifdef CONFIG_X86_RDC321X
++/* #define YO_TI1510_DATASHEET_GUY_EXPLAIN_THIS_JUNK 0x0044f044 */
++#define YO_TI1510_DATASHEET_GUY_EXPLAIN_THIS_JUNK 0x0844b060
++/* #define YO_TI1510_DATASHEET_GUY_EXPLAIN_THIS_JUNK 0x0044d044 */
++
++ config_writel(socket, 32*4, YO_TI1510_DATASHEET_GUY_EXPLAIN_THIS_JUNK);
++ config_writel(socket, 35*4, 0x00000022);
++ config_writel(socket, 36*4, 0x60200000);
++ config_writel(socket, 40*4, 0x7e020000);
++#endif
++
+ if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
+ /* No IRQ or request_irq failed. Poll */
+ socket->cb_irq = 0; /* But zero is a valid IRQ number. */
--- /dev/null
+--- a/arch/x86/boot/boot.h
++++ b/arch/x86/boot/boot.h
+@@ -64,7 +64,7 @@ static inline void outl(u32 v, u16 port)
+ {
+ asm volatile("outl %0,%1" : : "a" (v), "dN" (port));
+ }
+-static inline u32 inl(u32 port)
++static inline u32 inl(u16 port)
+ {
+ u32 v;
+ asm volatile("inl %1,%0" : "=a" (v) : "dN" (port));
+--- a/arch/x86/boot/pm.c
++++ b/arch/x86/boot/pm.c
+@@ -14,6 +14,9 @@
+
+ #include "boot.h"
+ #include <asm/segment.h>
++#ifdef CONFIG_X86_RDC321X
++#include <asm/rdc321x_defs.h>
++#endif
+
+ /*
+ * Invoke the realmode switch hook if present; otherwise
+@@ -112,6 +115,16 @@ void go_to_protected_mode(void)
+ die();
+ }
+
++#ifdef CONFIG_X86_RDC321X
++ {
++ u32 bootctl;
++
++ outl(0x80003840, RDC3210_CFGREG_ADDR);
++ bootctl = inl(RDC3210_CFGREG_DATA) | 0x07ff0000;
++ outl(bootctl, RDC3210_CFGREG_DATA);
++ }
++#endif
++
+ /* Reset coprocessor (IGNNE#) */
+ reset_coprocessor();
+
--- /dev/null
+--- a/drivers/mtd/maps/Kconfig
++++ b/drivers/mtd/maps/Kconfig
+@@ -158,6 +158,12 @@ config MTD_RDC3210_BUSWIDTH
+ Number of bytes addressed on the RDC-3210 flash device before
+ addressing the same chip again
+
++config MTD_R8610
++ tristate "CFI flash device mapped on R8610"
++ depends on X86 && MTD_CFI && MTD_PARTITIONS
++ help
++ Flash support for the RDC R8610 evaluation board.
++
+ config MTD_SC520CDP
+ tristate "CFI Flash device mapped on AMD SC520 CDP"
+ depends on X86 && MTD_CFI && MTD_CONCAT
+--- a/drivers/mtd/maps/Makefile
++++ b/drivers/mtd/maps/Makefile
+@@ -27,6 +27,7 @@ obj-$(CONFIG_MTD_PHYSMAP_OF) += physmap_
+ obj-$(CONFIG_MTD_PMC_MSP_EVM) += pmcmsp-flash.o
+ obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o
+ obj-$(CONFIG_MTD_RDC3210) += rdc3210.o
++obj-$(CONFIG_MTD_R8610) += r8610.o
+ obj-$(CONFIG_MTD_RPXLITE) += rpxlite.o
+ obj-$(CONFIG_MTD_TQM8XXL) += tqm8xxl.o
+ obj-$(CONFIG_MTD_SA1100) += sa1100-flash.o
--- /dev/null
+--- a/arch/x86/Kconfig
++++ b/arch/x86/Kconfig
+@@ -400,6 +400,8 @@ config X86_RDC321X
+ depends on X86_EXTENDED_PLATFORM
+ select M486
+ select X86_REBOOTFIXUPS
++ select EMBEDDED
++ select ARCH_REQUIRE_GPIOLIB
+ ---help---
+ This option is needed for RDC R-321x system-on-chip, also known
+ as R-8610-(G).
--- /dev/null
+--- /dev/null
++++ b/Documentation/x86/rdc.txt
+@@ -0,0 +1,69 @@
++
++Introduction
++============
++
++RDC (http://www.rdc.com.tw) have been manufacturing x86-compatible SoC
++(system-on-chips) for a number of years. They are not the fastest of
++CPUs (clock speeds ranging from 133-150MHz) but 486SX compatibility
++coupled with very low power consumption[1] and low cost make them ideal
++for embedded applications.
++
++
++Where to find
++=============
++
++RDC chips show up in numerous embedded devices, but be careful since
++many of them will not run Linux 2.6 without significant expertise.
++
++There are several variants of what the linux kernel refers to generically
++as RDC321X: R8610, R321x, S3282 and AMRISC20000.
++
++R321x: Found in various routers, see the OpenWrt project for details,
++ http://wiki.openwrt.org/oldwiki/rdcport
++
++R8610: Found on the RDC evaluation board
++ http://www.ivankuten.com/system-on-chip-soc/rdc-r8610/
++
++AMRISC20000: Found in the MGB-100 wireless hard disk
++ http://tintuc.no-ip.com/linux/tipps/mgb100/
++
++S3282: Found in various NAS devices, including the Bifferboard
++ http://www.bifferos.com
++
++
++Kernel Configuration
++====================
++
++Add support for this CPU with CONFIG_X86_RDC321X. Ensure that maths
++emulation is included (CONFIG_MATH_EMULATION selected) and avoid MCE
++(CONFIG_X86_MCE not selected).
++
++
++CPU detection
++=============
++
++None of these chips support the cpuid instruction, so as with some
++other x86 compatible SoCs, we must check the north bridge and look
++for specific 'signature' PCI device config.
++
++The current detection code has been tested only on the Bifferboard
++(S3282 CPU), please send bug reports or success stories with
++other devices to bifferos@yahoo.co.uk.
++
++
++Credits
++=======
++
++Many thanks to RDC for providing the customer codes to allow
++detection of all known variants, without which this detection code
++would have been very hard to ascertain.
++
++
++References
++==========
++
++[1] S3282 in certain NAS solutions consumes less than 1W
++
++
++mark@bifferos.com 2009
++
+--- a/arch/x86/Kconfig
++++ b/arch/x86/Kconfig
+@@ -398,6 +398,7 @@ config X86_RDC321X
+ bool "RDC R-321x SoC"
+ depends on X86_32
+ depends on X86_EXTENDED_PLATFORM
++ select PCI
+ select M486
+ select X86_REBOOTFIXUPS
+ select EMBEDDED
+--- a/arch/x86/include/asm/processor.h
++++ b/arch/x86/include/asm/processor.h
+@@ -122,7 +122,8 @@ struct cpuinfo_x86 {
+ #define X86_VENDOR_CENTAUR 5
+ #define X86_VENDOR_TRANSMETA 7
+ #define X86_VENDOR_NSC 8
+-#define X86_VENDOR_NUM 9
++#define X86_VENDOR_RDC 9
++#define X86_VENDOR_NUM 10
+
+ #define X86_VENDOR_UNKNOWN 0xff
+
+--- a/arch/x86/kernel/cpu/Makefile
++++ b/arch/x86/kernel/cpu/Makefile
+@@ -24,6 +24,7 @@ obj-$(CONFIG_CPU_SUP_CYRIX_32) += cyrix
+ obj-$(CONFIG_CPU_SUP_CENTAUR) += centaur.o
+ obj-$(CONFIG_CPU_SUP_TRANSMETA_32) += transmeta.o
+ obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o
++obj-$(CONFIG_X86_RDC321X) += rdc.o
+
+ obj-$(CONFIG_PERF_EVENTS) += perf_event.o
+
+--- /dev/null
++++ b/arch/x86/kernel/cpu/rdc.c
+@@ -0,0 +1,69 @@
++/*
++ * See Documentation/x86/rdc.txt
++ *
++ * mark@bifferos.com
++ */
++
++#include <linux/pci.h>
++#include <asm/pci-direct.h>
++#include "cpu.h"
++
++
++static void __cpuinit rdc_identify(struct cpuinfo_x86 *c)
++{
++ u16 vendor, device;
++ u32 customer_id;
++
++ if (!early_pci_allowed())
++ return;
++
++ /* RDC CPU is SoC (system-on-chip), Northbridge is always present */
++ vendor = read_pci_config_16(0, 0, 0, PCI_VENDOR_ID);
++ device = read_pci_config_16(0, 0, 0, PCI_DEVICE_ID);
++
++ if (vendor != PCI_VENDOR_ID_RDC || device != PCI_DEVICE_ID_RDC_R6020)
++ return; /* not RDC */
++ /*
++ * NB: We could go on and check other devices, e.g. r6040 NIC, but
++ * that's probably overkill
++ */
++
++ customer_id = read_pci_config(0, 0, 0, 0x90);
++
++ switch (customer_id) {
++ /* id names are from RDC */
++ case 0x00321000:
++ strcpy(c->x86_model_id, "R3210/R3211");
++ break;
++ case 0x00321001:
++ strcpy(c->x86_model_id, "AMITRISC20000/20010");
++ break;
++ case 0x00321002:
++ strcpy(c->x86_model_id, "R3210X/Edimax");
++ break;
++ case 0x00321003:
++ strcpy(c->x86_model_id, "R3210/Kcodes");
++ break;
++ case 0x00321004: /* tested */
++ strcpy(c->x86_model_id, "S3282/CodeTek");
++ break;
++ case 0x00321007:
++ strcpy(c->x86_model_id, "R8610");
++ break;
++ default:
++ pr_info("RDC CPU: Unrecognised Customer ID (0x%x) please report to linux-kernel@vger.kernel.org\n", customer_id);
++ return;
++ }
++
++ strcpy(c->x86_vendor_id, "RDC");
++ c->x86_vendor = X86_VENDOR_RDC;
++}
++
++static const struct cpu_dev __cpuinitconst rdc_cpu_dev = {
++ .c_vendor = "RDC",
++ .c_ident = { "RDC" },
++ .c_identify = rdc_identify,
++ .c_x86_vendor = X86_VENDOR_RDC,
++};
++
++cpu_dev_register(rdc_cpu_dev);
projects / openwrt / staging / chunkeey.git / commitdiff