drm/i915: Save/restore irq state for vlv_residency_raw()
authorChris Wilson <chris@chris-wilson.co.uk>
Wed, 22 Nov 2017 22:25:10 +0000 (22:25 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 23 Nov 2017 07:19:10 +0000 (07:19 +0000)
Since commit 6060b6aec03c ("drm/i915/pmu: Add RC6 residency metrics"),
vlv_residency_raw() may be called from an irq-disabled context (via perf
event sampling on remote cpu). As such, we can no longer assume that we
are called from process context and must save/restore the irq state for
the spinlock.

Fixes: 6060b6aec03c ("drm/i915/pmu: Add RC6 residency metrics")
Testcase: igt/perf_pmu/other-init-3
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20171122222510.22627-1-chris@chris-wilson.co.uk
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
drivers/gpu/drm/i915/intel_pm.c

index 7d41aad791665364af4acc6a027b35fe614665ff..03d67d8ab647db08d42d881f882f3c13415ebacd 100644 (file)
@@ -9396,12 +9396,13 @@ static u64 vlv_residency_raw(struct drm_i915_private *dev_priv,
                             const i915_reg_t reg)
 {
        u32 lower, upper, tmp;
+       unsigned long flags;
        int loop = 2;
 
        /* The register accessed do not need forcewake. We borrow
         * uncore lock to prevent concurrent access to range reg.
         */
-       spin_lock_irq(&dev_priv->uncore.lock);
+       spin_lock_irqsave(&dev_priv->uncore.lock, flags);
 
        /* vlv and chv residency counters are 40 bits in width.
         * With a control bit, we can choose between upper or lower
@@ -9432,7 +9433,7 @@ static u64 vlv_residency_raw(struct drm_i915_private *dev_priv,
         * now.
         */
 
-       spin_unlock_irq(&dev_priv->uncore.lock);
+       spin_unlock_irqrestore(&dev_priv->uncore.lock, flags);
 
        return lower | (u64)upper << 8;
 }
@@ -9451,7 +9452,6 @@ u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv,
                mul = 1000000;
                div = dev_priv->czclk_freq;
                time_hw = vlv_residency_raw(dev_priv, reg);
-
        } else {
                /* 833.33ns units on Gen9LP, 1.28us elsewhere. */
                if (IS_GEN9_LP(dev_priv)) {