--- /dev/null
+From: Felix Fietkau <nbd@openwrt.org>
+Date: Thu, 26 Nov 2015 17:03:46 +0100
+Subject: [PATCH] Revert "mtd: spi-nor: disable protection for Winbond flash at
+ startup"
+
+This reverts commit c6fc2171b249e73745c497b578b417a2946f1b2f.
+
+This commit is breaking read access on at least s25fl064k, but also
+possibly other Spansion flash chips.
+
+Any mtd read seems to succeed, but simply returns a zero-filled buffer.
+
+Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+---
+
+--- a/drivers/mtd/spi-nor/spi-nor.c
++++ b/drivers/mtd/spi-nor/spi-nor.c
+@@ -1194,14 +1194,13 @@ int spi_nor_scan(struct spi_nor *nor, co
+ mutex_init(&nor->lock);
+
+ /*
+- * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
+- * with the software protection bits set
++ * Atmel, SST and Intel/Numonyx serial nor tend to power
++ * up with the software protection bits set
+ */
+
+ if (JEDEC_MFR(info) == SNOR_MFR_ATMEL ||
+ JEDEC_MFR(info) == SNOR_MFR_INTEL ||
+- JEDEC_MFR(info) == SNOR_MFR_SST ||
+- JEDEC_MFR(info) == SNOR_MFR_WINBOND) {
++ JEDEC_MFR(info) == SNOR_MFR_SST) {
+ write_enable(nor);
+ write_sr(nor, 0);
+ }
if (JEDEC_MFR(info) == SNOR_MFR_ATMEL ||
JEDEC_MFR(info) == SNOR_MFR_INTEL ||
+ JEDEC_MFR(info) == SNOR_MFR_MACRONIX ||
- JEDEC_MFR(info) == SNOR_MFR_SST ||
- JEDEC_MFR(info) == SNOR_MFR_WINBOND) {
+ JEDEC_MFR(info) == SNOR_MFR_SST) {
write_enable(nor);
+ write_sr(nor, 0);
--- /dev/null
+From: Felix Fietkau <nbd@openwrt.org>
+Date: Thu, 26 Nov 2015 17:03:46 +0100
+Subject: [PATCH] Revert "mtd: spi-nor: disable protection for Winbond flash at
+ startup"
+
+This reverts commit c6fc2171b249e73745c497b578b417a2946f1b2f.
+
+This commit is breaking read access on at least s25fl064k, but also
+possibly other Spansion flash chips.
+
+Any mtd read seems to succeed, but simply returns a zero-filled buffer.
+
+Signed-off-by: Felix Fietkau <nbd@openwrt.org>
+---
+
+--- a/drivers/mtd/spi-nor/spi-nor.c
++++ b/drivers/mtd/spi-nor/spi-nor.c
+@@ -1194,14 +1194,13 @@ int spi_nor_scan(struct spi_nor *nor, co
+ mutex_init(&nor->lock);
+
+ /*
+- * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
+- * with the software protection bits set
++ * Atmel, SST and Intel/Numonyx serial nor tend to power
++ * up with the software protection bits set
+ */
+
+ if (JEDEC_MFR(info) == SNOR_MFR_ATMEL ||
+ JEDEC_MFR(info) == SNOR_MFR_INTEL ||
+- JEDEC_MFR(info) == SNOR_MFR_SST ||
+- JEDEC_MFR(info) == SNOR_MFR_WINBOND) {
++ JEDEC_MFR(info) == SNOR_MFR_SST) {
+ write_enable(nor);
+ write_sr(nor, 0);
+ }
if (JEDEC_MFR(info) == SNOR_MFR_ATMEL ||
JEDEC_MFR(info) == SNOR_MFR_INTEL ||
+ JEDEC_MFR(info) == SNOR_MFR_MACRONIX ||
- JEDEC_MFR(info) == SNOR_MFR_SST ||
- JEDEC_MFR(info) == SNOR_MFR_WINBOND) {
+ JEDEC_MFR(info) == SNOR_MFR_SST) {
write_enable(nor);
+ write_sr(nor, 0);