#define BIT(x) (1 << (x))
#define MAX_PREDIV 64
-#define MAX_POSTDIV 8
+#define MAX_POSTDIV 8UL
#define MAX_MULT 512
#define MAX_DIV (MAX_PREDIV * MAX_POSTDIV)
pllctl_reg_write(data->pll, ctl, tmp);
mult = data->pll_freq / fpll;
- for (mult = max(mult, 1); mult <= MAX_MULT; mult++) {
+ for (mult = max(mult, 1UL); mult <= MAX_MULT; mult++) {
div = (fpll * mult) / data->pll_freq;
if (div < 1 || div > MAX_DIV)
continue;
return 1;
for (i = 1; i <= loops; i++) {
- const unsigned int effective_div = max(min(input_rate / i /
- target_rate, cap), 1);
+ const unsigned int effective_div =
+ max(min(input_rate / i / target_rate, cap), 1U);
const unsigned int effective_rate = input_rate / i /
effective_div;
const int error = target_rate - effective_rate;
}
for (upto = 0, i = 0; upto < uboot_size; upto += todo, i++) {
- todo = min(uboot_size - upto, (1 << 15));
+ todo = min(uboot_size - upto, (unsigned int)(1 << 15));
spi_rx_tx(regs, todo, (void *)(uboot_addr),
(void *)(SPI_FLASH_UBOOT_POS), i);
}
writel(0, &dc->win.h_initial_dda);
writel(0, &dc->win.v_initial_dda);
- h_dda = (win->w * 0x1000) / max(win->out_w - 1, 1);
- v_dda = (win->h * 0x1000) / max(win->out_h - 1, 1);
+ h_dda = (win->w * 0x1000) / max(win->out_w - 1, 1U);
+ v_dda = (win->h * 0x1000) / max(win->out_h - 1, 1U);
val = h_dda << H_DDA_INC_SHIFT;
val |= v_dda << V_DDA_INC_SHIFT;
sm_writel(PM_GCCTRL(id), parent | SM_BIT(CEN));
rate = parent_rate;
} else {
- divider = min(255, divider / 2 - 1);
+ divider = min(255UL, divider / 2 - 1);
sm_writel(PM_GCCTRL(id), parent | SM_BIT(CEN) | SM_BIT(DIVEN)
| SM_BF(DIV, divider));
rate = parent_rate / (2 * (divider + 1));
inbound_len = emudat;
} else {
/* store the bytes */
- leftovers_len = min(4, inbound_len);
+ leftovers_len = min((size_t)4, inbound_len);
inbound_len -= leftovers_len;
leftovers = emudat;
}
*dshift = WDSIZE_P;
#endif
- *bpos = min(limit, ffs(ldst | lsrc | count)) - 1;
+ *bpos = min(limit, (unsigned long)ffs(ldst | lsrc | count)) - 1;
}
/* This version misbehaves for count values of 0 and 2^16+.
#ifdef PSIZE
/* The max memory DMA peripheral transfer size is 4 bytes. */
- dsize |= min(2, bpos) << PSIZE_P;
+ dsize |= min(2UL, bpos) << PSIZE_P;
#endif
/* Copy sram functions from sdram to sram */
unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
u64 memsize = (u64)memsize_in_meg << 20;
- memsize = min(memsize, CONFIG_MAX_MEM_MAPPED);
+ memsize = min(memsize, (u64)CONFIG_MAX_MEM_MAPPED);
memsize = tlb_map_range(ram_tlb_address, p_addr, memsize, TLB_MAP_RAM);
if (memsize)
for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) {
/* If a dimm is installed in a particular slot ... */
if (dimm_populated[dimm_num] != SDRAM_NONE)
- t_wr_ns = max(t_wr_ns,
+ t_wr_ns = max(t_wr_ns, (unsigned long)
spd_read(iic0_dimm_addr[dimm_num], 36) >> 2);
}
else
sdram_ddr1 = false;
- t_rcd_ns = max(t_rcd_ns, spd_read(iic0_dimm_addr[dimm_num], 29) >> 2);
- t_rrd_ns = max(t_rrd_ns, spd_read(iic0_dimm_addr[dimm_num], 28) >> 2);
- t_rp_ns = max(t_rp_ns, spd_read(iic0_dimm_addr[dimm_num], 27) >> 2);
- t_ras_ns = max(t_ras_ns, spd_read(iic0_dimm_addr[dimm_num], 30));
- t_rc_ns = max(t_rc_ns, spd_read(iic0_dimm_addr[dimm_num], 41));
- t_rfc_ns = max(t_rfc_ns, spd_read(iic0_dimm_addr[dimm_num], 42));
+ t_rcd_ns = max(t_rcd_ns,
+ (unsigned long)spd_read(iic0_dimm_addr[dimm_num], 29) >> 2);
+ t_rrd_ns = max(t_rrd_ns,
+ (unsigned long)spd_read(iic0_dimm_addr[dimm_num], 28) >> 2);
+ t_rp_ns = max(t_rp_ns,
+ (unsigned long)spd_read(iic0_dimm_addr[dimm_num], 27) >> 2);
+ t_ras_ns = max(t_ras_ns,
+ (unsigned long)spd_read(iic0_dimm_addr[dimm_num], 30));
+ t_rc_ns = max(t_rc_ns,
+ (unsigned long)spd_read(iic0_dimm_addr[dimm_num], 41));
+ t_rfc_ns = max(t_rfc_ns,
+ (unsigned long)spd_read(iic0_dimm_addr[dimm_num], 42));
}
}
for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) {
/* If a dimm is installed in a particular slot ... */
if (dimm_populated[dimm_num] != SDRAM_NONE) {
- t_wpc_ns = max(t_wtr_ns, spd_read(iic0_dimm_addr[dimm_num], 36) >> 2);
- t_wtr_ns = max(t_wtr_ns, spd_read(iic0_dimm_addr[dimm_num], 37) >> 2);
- t_rpc_ns = max(t_rpc_ns, spd_read(iic0_dimm_addr[dimm_num], 38) >> 2);
+ t_wpc_ns = max(t_wtr_ns,
+ (unsigned long)spd_read(iic0_dimm_addr[dimm_num], 36) >> 2);
+ t_wtr_ns = max(t_wtr_ns,
+ (unsigned long)spd_read(iic0_dimm_addr[dimm_num], 37) >> 2);
+ t_rpc_ns = max(t_rpc_ns,
+ (unsigned long)spd_read(iic0_dimm_addr[dimm_num], 38) >> 2);
}
}
for (dimm_num = 0; dimm_num < MAXDIMMS; dimm_num++) {
/* If a dimm is installed in a particular slot ... */
if (dimm_populated[dimm_num] != SDRAM_NONE)
- ecc = max(ecc, spd_read(iic0_dimm_addr[dimm_num], 11));
+ ecc = max(ecc,
+ (unsigned long)spd_read(iic0_dimm_addr[dimm_num], 11));
}
if (ecc == 0)
return;
#endif
size = min(bootm_size, get_effective_memsize());
- size = min(size, CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE);
+ size = min(size, (ulong)CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE);
if (size < bootm_size) {
ulong base = bootmap_base + size;
max_arg_len = 0;
for (i = 0; i < num_options; ++i)
- max_arg_len = max(strlen(sb_opt[i]->flag), max_arg_len);
+ max_arg_len = max((int)strlen(sb_opt[i]->flag), max_arg_len);
max_noarg_len = max_arg_len + 7;
for (i = 0; i < num_options; ++i) {
{
u8 secondary;
hose->read_byte(hose, dev, PCI_SECONDARY_BUS, &secondary);
- hose->last_busno = max(hose->last_busno, secondary);
+ hose->last_busno = max(hose->last_busno, (int)secondary);
pci_hose_scan_bus(hose, secondary);
}
{
int i;
- unsigned num_entries = min(lib_sysinfo.n_memranges, max_entries);
+ unsigned num_entries = min((unsigned)lib_sysinfo.n_memranges, max_entries);
if (num_entries < lib_sysinfo.n_memranges) {
printf("Warning: Limiting e820 map to %d entries.\n",
num_entries);
e.date[3] & 0x80 ? "PM" : "");
/* Show MAC addresses */
- for (i = 0; i < min(e.mac_count, MAX_NUM_PORTS); i++) {
+ for (i = 0; i < min(e.mac_count, (u8)MAX_NUM_PORTS); i++) {
u8 *p = e.mac[i];
*/
for (i = 0, p = &e; i < sizeof(e); i += 8, p += 8) {
ret = i2c_write(CONFIG_SYS_I2C_EEPROM_ADDR, i, CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
- p, min((sizeof(e) - i), 8));
+ p, min((int)(sizeof(e) - i), 8));
if (ret)
break;
udelay(5000); /* 5ms write cycle timing */
memset(e.mac[8], 0xff, 6);
#endif
- for (i = 0; i < min(e.mac_count, MAX_NUM_PORTS); i++) {
+ for (i = 0; i < min(e.mac_count, (u8)MAX_NUM_PORTS); i++) {
if (memcmp(&e.mac[i], "\0\0\0\0\0\0", 6) &&
memcmp(&e.mac[i], "\xFF\xFF\xFF\xFF\xFF\xFF", 6)) {
char ethaddr[18];
tmp_buf);
if (!n)
goto failure;
- result = min(size, blk_len - ofs);
+ result = min(size, (int)(blk_len - ofs));
memcpy(dst, tmp_buf + ofs, result);
dst += result;
size -= result;
src_buf = buf;
for (ptr = (uint8_t *)src_buf, i = 20; i > 0;
i -= data_size, ptr += data_size)
- memcpy(ptr, data, min(i, data_size));
+ memcpy(ptr, data,
+ min_t(size_t, i, data_size));
}
}
bin_func(dst_reg->digest, src_buf, 20);
void *reg = (void *)CKSEG1ADDR(MALTA_ASCIIPOS0);
/* print up to 8 characters of the string */
- for (i = 0; i < min(strlen(str), 8); i++) {
+ for (i = 0; i < min((int)strlen(str), 8); i++) {
__raw_writel(str[i], reg);
reg += MALTA_ASCIIPOS1 - MALTA_ASCIIPOS0;
}
*/
bootline = getenv("bootargs");
if (bootline) {
- memcpy((void *) bootaddr, bootline,
- max(strlen(bootline), 255));
- flush_cache(bootaddr, max(strlen(bootline), 255));
+ memcpy((void *)bootaddr, bootline,
+ max(strlen(bootline), (size_t)255));
+ flush_cache(bootaddr, max(strlen(bootline), (size_t)255));
} else {
sprintf(build_buf, CONFIG_SYS_VXWORKS_BOOT_DEVICE);
tmp = getenv("bootfile");
CONFIG_SYS_VXWORKS_ADD_PARAMS);
#endif
- memcpy((void *) bootaddr, build_buf,
- max(strlen(build_buf), 255));
- flush_cache(bootaddr, max(strlen(build_buf), 255));
+ memcpy((void *)bootaddr, build_buf,
+ max(strlen(build_buf), (size_t)255));
+ flush_cache(bootaddr, max(strlen(build_buf), (size_t)255));
}
/*
static struct spi_flash *flash;
-
/*
* This function computes the length argument for the erase command.
* The length on which the command is to operate can be given in two forms:
{
/* less accurate but avoids overflow */
if (len >= ((unsigned int) -1) / 1024)
- return len / (max(get_timer(start_ms) / 1024, 1));
+ return len / (max(get_timer(start_ms) / 1024, 1UL));
else
- return 1024 * len / max(get_timer(start_ms), 1);
+ return 1024 * len / max(get_timer(start_ms), 1UL);
}
static int do_spi_flash_probe(int argc, char * const argv[])
ulong last_update = get_timer(0);
for (; buf < end && !err_oper; buf += todo, offset += todo) {
- todo = min(end - buf, flash->sector_size);
+ todo = min_t(size_t, end - buf, flash->sector_size);
if (get_timer(last_update) > 100) {
printf(" \rUpdating, %zu%% %lu B/s",
100 - (end - buf) / scale,
for (i = 0; i < len; i++) {
if (vbuf[i] != 0xff) {
printf("Check failed at %d\n", i);
- print_buffer(i, vbuf + i, 1, min(len - i, 0x40), 0);
+ print_buffer(i, vbuf + i, 1,
+ min_t(uint, len - i, 0x40), 0);
return -1;
}
}
for (i = 0; i < len; i++) {
if (buf[i] != vbuf[i]) {
printf("Verify failed at %d, good data:\n", i);
- print_buffer(i, buf + i, 1, min(len - i, 0x40), 0);
+ print_buffer(i, buf + i, 1,
+ min_t(uint, len - i, 0x40), 0);
printf("Bad data:\n");
- print_buffer(i, vbuf + i, 1, min(len - i, 0x40), 0);
+ print_buffer(i, vbuf + i, 1,
+ min_t(uint, len - i, 0x40), 0);
return -1;
}
}
u_char *char_ptr;
blocksize = nand_info[0].erasesize;
- len = min(blocksize, CONFIG_ENV_SIZE);
+ len = min(blocksize, (size_t)CONFIG_ENV_SIZE);
while (amount_saved < CONFIG_ENV_SIZE && offset < end) {
if (nand_block_isbad(&nand_info[0], offset)) {
if (!blocksize)
return 1;
- len = min(blocksize, CONFIG_ENV_SIZE);
+ len = min(blocksize, (size_t)CONFIG_ENV_SIZE);
while (amount_loaded < CONFIG_ENV_SIZE && offset < end) {
if (nand_block_isbad(&nand_info[0], offset)) {
*/
int fdt_alloc_phandle(void *blob)
{
- int offset, phandle = 0;
+ int offset;
+ uint32_t phandle = 0;
for (offset = fdt_next_node(blob, -1, NULL); offset >= 0;
offset = fdt_next_node(blob, offset, NULL)) {
else
return;
- *axis = max(0, axis_alignment);
+ *axis = max(0, (int)axis_alignment);
}
#endif
void lcd_position_cursor(unsigned col, unsigned row)
{
- console_col = min(col, CONSOLE_COLS - 1);
- console_row = min(row, CONSOLE_ROWS - 1);
+ console_col = min_t(short, col, CONSOLE_COLS - 1);
+ console_row = min_t(short, row, CONSOLE_ROWS - 1);
}
int lcd_get_pixel_width(void)
}
descriptor = (struct usb_hub_descriptor *)buffer;
- length = min(descriptor->bLength, sizeof(struct usb_hub_descriptor));
+ length = min_t(int, descriptor->bLength,
+ sizeof(struct usb_hub_descriptor));
if (usb_get_hub_descriptor(dev, buffer, length) < 0) {
debug("usb_hub_configure: failed to get hub " \
u16 now_blocks; /* number of blocks per iteration */
u32 transfer_size; /* number of bytes per iteration */
- now_blocks = min(MAX_SATA_BLOCKS_READ_WRITE, blocks);
+ now_blocks = min((u16)MAX_SATA_BLOCKS_READ_WRITE, blocks);
transfer_size = ATA_SECT_SIZE * now_blocks;
if (transfer_size > user_buffer_size) {
#ifdef CONFIG_SYS_FSL_DDR4
/* tXP=max(4nCK, 6ns) */
- int txp = max(mclk_ps * 4, 6000); /* unit=ps */
+ int txp = max((int)mclk_ps * 4, 6000); /* unit=ps */
trwt_mclk = 2;
twrt_mclk = 1;
act_pd_exit_mclk = picos_to_mclk(txp);
* MRS_CYC = max(tMRD, tMOD)
* tMRD = 8nCK, tMOD = max(24nCK, 15ns)
*/
- tmrd_mclk = max(24, picos_to_mclk(15000));
+ tmrd_mclk = max(24U, picos_to_mclk(15000));
#elif defined(CONFIG_SYS_FSL_DDR3)
unsigned int data_rate = get_ddr_freq(0);
int txp;
* spec has not the tAXPD, we use
* tAXPD=1, need design to confirm.
*/
- txp = max(mclk_ps * 3, (mclk_ps > 1540 ? 7500 : 6000));
+ txp = max((int)mclk_ps * 3, (mclk_ps > 1540 ? 7500 : 6000));
tmrd_mclk = 4;
/* set the turnaround time */
#ifdef CONFIG_SYS_FSL_DDR4
refrec_ctrl = picos_to_mclk(common_dimm->trfc1_ps) - 8;
wrrec_mclk = picos_to_mclk(common_dimm->twr_ps);
- acttoact_mclk = max(picos_to_mclk(common_dimm->trrds_ps), 4);
- wrtord_mclk = max(2, picos_to_mclk(2500));
+ acttoact_mclk = max(picos_to_mclk(common_dimm->trrds_ps), 4U);
+ wrtord_mclk = max(2U, picos_to_mclk(2500));
if ((wrrec_mclk < 1) || (wrrec_mclk > 24))
printf("Error: WRREC doesn't support %d clocks\n", wrrec_mclk);
else
wr_data_delay = popts->write_data_delay;
#ifdef CONFIG_SYS_FSL_DDR4
cpo = 0;
- cke_pls = max(3, picos_to_mclk(5000));
+ cke_pls = max(3U, picos_to_mclk(5000));
#elif defined(CONFIG_SYS_FSL_DDR3)
/*
* cke pulse = max(3nCK, 7.5ns) for DDR3-800
* max(3nCK, 5.625ns) for DDR3-1066, 1333
* max(3nCK, 5ns) for DDR3-1600, 1866, 2133
*/
- cke_pls = max(3, picos_to_mclk(mclk_ps > 1870 ? 7500 :
+ cke_pls = max(3U, picos_to_mclk(mclk_ps > 1870 ? 7500 :
(mclk_ps > 1245 ? 5625 : 5000)));
#else
cke_pls = FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR;
unsigned int txpr, tcksre, tcksrx;
unsigned int cke_rst, cksre, cksrx, par_lat, cs_to_cmd;
- txpr = max(5, picos_to_mclk(common_dimm->trfc1_ps + 10000));
- tcksre = max(5, picos_to_mclk(10000));
- tcksrx = max(5, picos_to_mclk(10000));
+ txpr = max(5U, picos_to_mclk(common_dimm->trfc1_ps + 10000));
+ tcksre = max(5U, picos_to_mclk(10000));
+ tcksrx = max(5U, picos_to_mclk(10000));
par_lat = 0;
cs_to_cmd = 0;
}
acttoact_bg = picos_to_mclk(common_dimm->trrdl_ps);
- wrtord_bg = max(4, picos_to_mclk(7500));
+ wrtord_bg = max(4U, picos_to_mclk(7500));
if (popts->otf_burst_chop_en)
wrtord_bg += 2;
* Find minimum tckmax_ps to find fastest slow speed,
* i.e., this is the slowest the whole system can go.
*/
- tckmax_ps = min(tckmax_ps, dimm_params[i].tckmax_ps);
+ tckmax_ps = min(tckmax_ps,
+ (unsigned int)dimm_params[i].tckmax_ps);
#if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4)
- taamin_ps = max(taamin_ps, dimm_params[i].taa_ps);
+ taamin_ps = max(taamin_ps,
+ (unsigned int)dimm_params[i].taa_ps);
#endif
- tckmin_x_ps = max(tckmin_x_ps, dimm_params[i].tckmin_x_ps);
- trcd_ps = max(trcd_ps, dimm_params[i].trcd_ps);
- trp_ps = max(trp_ps, dimm_params[i].trp_ps);
- tras_ps = max(tras_ps, dimm_params[i].tras_ps);
+ tckmin_x_ps = max(tckmin_x_ps,
+ (unsigned int)dimm_params[i].tckmin_x_ps);
+ trcd_ps = max(trcd_ps, (unsigned int)dimm_params[i].trcd_ps);
+ trp_ps = max(trp_ps, (unsigned int)dimm_params[i].trp_ps);
+ tras_ps = max(tras_ps, (unsigned int)dimm_params[i].tras_ps);
#ifdef CONFIG_SYS_FSL_DDR4
- trfc1_ps = max(trfc1_ps, dimm_params[i].trfc1_ps);
- trfc2_ps = max(trfc2_ps, dimm_params[i].trfc2_ps);
- trfc4_ps = max(trfc4_ps, dimm_params[i].trfc4_ps);
- trrds_ps = max(trrds_ps, dimm_params[i].trrds_ps);
- trrdl_ps = max(trrdl_ps, dimm_params[i].trrdl_ps);
- tccdl_ps = max(tccdl_ps, dimm_params[i].tccdl_ps);
+ trfc1_ps = max(trfc1_ps,
+ (unsigned int)dimm_params[i].trfc1_ps);
+ trfc2_ps = max(trfc2_ps,
+ (unsigned int)dimm_params[i].trfc2_ps);
+ trfc4_ps = max(trfc4_ps,
+ (unsigned int)dimm_params[i].trfc4_ps);
+ trrds_ps = max(trrds_ps,
+ (unsigned int)dimm_params[i].trrds_ps);
+ trrdl_ps = max(trrdl_ps,
+ (unsigned int)dimm_params[i].trrdl_ps);
+ tccdl_ps = max(tccdl_ps,
+ (unsigned int)dimm_params[i].tccdl_ps);
#else
- twr_ps = max(twr_ps, dimm_params[i].twr_ps);
- twtr_ps = max(twtr_ps, dimm_params[i].twtr_ps);
- trfc_ps = max(trfc_ps, dimm_params[i].trfc_ps);
- trrd_ps = max(trrd_ps, dimm_params[i].trrd_ps);
- trtp_ps = max(trtp_ps, dimm_params[i].trtp_ps);
+ twr_ps = max(twr_ps, (unsigned int)dimm_params[i].twr_ps);
+ twtr_ps = max(twtr_ps, (unsigned int)dimm_params[i].twtr_ps);
+ trfc_ps = max(trfc_ps, (unsigned int)dimm_params[i].trfc_ps);
+ trrd_ps = max(trrd_ps, (unsigned int)dimm_params[i].trrd_ps);
+ trtp_ps = max(trtp_ps, (unsigned int)dimm_params[i].trtp_ps);
#endif
- trc_ps = max(trc_ps, dimm_params[i].trc_ps);
+ trc_ps = max(trc_ps, (unsigned int)dimm_params[i].trc_ps);
#if defined(CONFIG_SYS_FSL_DDR1) || defined(CONFIG_SYS_FSL_DDR2)
- tis_ps = max(tis_ps, dimm_params[i].tis_ps);
- tih_ps = max(tih_ps, dimm_params[i].tih_ps);
- tds_ps = max(tds_ps, dimm_params[i].tds_ps);
- tdh_ps = max(tdh_ps, dimm_params[i].tdh_ps);
- tqhs_ps = max(tqhs_ps, dimm_params[i].tqhs_ps);
+ tis_ps = max(tis_ps, (unsigned int)dimm_params[i].tis_ps);
+ tih_ps = max(tih_ps, (unsigned int)dimm_params[i].tih_ps);
+ tds_ps = max(tds_ps, (unsigned int)dimm_params[i].tds_ps);
+ tdh_ps = max(tdh_ps, (unsigned int)dimm_params[i].tdh_ps);
+ tqhs_ps = max(tqhs_ps, (unsigned int)dimm_params[i].tqhs_ps);
/*
* Find maximum tdqsq_max_ps to find slowest.
*
* FIXME: is finding the slowest value the correct
* strategy for this parameter?
*/
- tdqsq_max_ps = max(tdqsq_max_ps, dimm_params[i].tdqsq_max_ps);
+ tdqsq_max_ps = max(tdqsq_max_ps,
+ (unsigned int)dimm_params[i].tdqsq_max_ps);
#endif
refresh_rate_ps = max(refresh_rate_ps,
- dimm_params[i].refresh_rate_ps);
+ (unsigned int)dimm_params[i].refresh_rate_ps);
/* extended_op_srt is either 0 or 1, 0 having priority */
extended_op_srt = min(extended_op_srt,
- dimm_params[i].extended_op_srt);
+ (unsigned int)dimm_params[i].extended_op_srt);
}
outpdimm->ndimms_present = number_of_dimms - temp1;
i2c_write(SPD_SPA1_ADDRESS, 0, 1, &dummy, 1);
ret = i2c_read(i2c_address, 0, 1,
(uchar *)((ulong)spd + 256),
- min(256, sizeof(generic_spd_eeprom_t) - 256));
+ min(256,
+ (int)sizeof(generic_spd_eeprom_t) - 256));
}
#else
ret = i2c_read(i2c_address, 0, 1, (uchar *)spd,
readn = 0;
while (size > 0) {
/* get chunk that can be read */
- chunk = min(size, dfu->b_left);
+ chunk = min((long)size, dfu->b_left);
/* consume */
if (chunk > 0) {
memcpy(buf, dfu->i_buf, chunk);
static unsigned int set_i2c_bus_speed(const struct fsl_i2c *dev,
unsigned int i2c_clk, unsigned int speed)
{
- unsigned short divider = min(i2c_clk / speed, (unsigned short) -1);
+ unsigned short divider = min(i2c_clk / speed, (unsigned int)USHRT_MAX);
/*
* We want to choose an FDR/DFSR that generates an I2C bus speed that
return -1;
}
- len = min(p[1], din_len);
+ len = min((int)p[1], din_len);
cros_ec_dump_data("in", -1, p, len + 3);
/* Response code is first byte of message */
#endif
cfg->cfg.f_min = 400000;
- cfg->cfg.f_max = min(gd->arch.sdhc_clk, 52000000);
+ cfg->cfg.f_max = min(gd->arch.sdhc_clk, (u32)52000000);
cfg->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
while (len) {
/* The controller has data ready */
if (readl(®s->i_reg) & MMC_I_REG_RXFIFO_RD_REQ) {
- size = min(len, PXAMMC_FIFO_SIZE);
+ size = min(len, (uint32_t)PXAMMC_FIFO_SIZE);
len -= size;
size /= 4;
while (len) {
/* The controller is ready to receive data */
if (readl(®s->i_reg) & MMC_I_REG_TXFIFO_WR_REQ) {
- size = min(len, PXAMMC_FIFO_SIZE);
+ size = min(len, (uint32_t)PXAMMC_FIFO_SIZE);
len -= size;
size /= 4;
while (size--)
writel(*buf++, ®s->txfifo);
- if (min(len, PXAMMC_FIFO_SIZE) < 32)
+ if (min(len, (uint32_t)PXAMMC_FIFO_SIZE) < 32)
writel(MMC_PRTBUF_BUF_PART_FULL, ®s->prtbuf);
}
if (ret < 0)
return ret;
- readlen = min(page_size - column, size);
+ readlen = min(page_size - column, (int)size);
memcpy(dst, page_buffer, readlen);
column = 0;
int ret;
while (size > 0) {
- todo = min(size, sizeof(sandbox_sf_0xff));
+ todo = min(size, (int)sizeof(sandbox_sf_0xff));
ret = os_write(sbsf->fd, sandbox_sf_0xff, todo);
if (ret != todo)
return ret;
return ret;
#endif
byte_addr = offset % page_size;
- chunk_len = min(len - actual, page_size - byte_addr);
+ chunk_len = min(len - actual, (size_t)(page_size - byte_addr));
if (flash->spi->max_write_size)
- chunk_len = min(chunk_len, flash->spi->max_write_size);
+ chunk_len = min(chunk_len,
+ (size_t)flash->spi->max_write_size);
spi_flash_addr(write_addr, cmd);
len = strlen(s);
while (len) {
- int send_len = min(len, sizeof(input_buffer));
+ int send_len = min(len, (int)sizeof(input_buffer));
nc_send_packet(s, send_len);
len -= send_len;
s += send_len;
#endif
#ifdef CONFIG_PCI_PNP
- sub_bus = max(pciauto_config_device(hose, dev), sub_bus);
+ sub_bus = max((unsigned int)pciauto_config_device(hose, dev),
+ sub_bus);
#else
cfg = pci_find_config(hose, class, vendor, device,
PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
if (cfg) {
cfg->config_device(hose, dev, cfg);
- sub_bus = max(sub_bus, hose->current_busno);
+ sub_bus = max(sub_bus,
+ (unsigned int)hose->current_busno);
}
#endif
n = pci_hose_scan_bus(hose, hose->current_busno);
/* figure out the deepest we've gone for this leg */
- sub_bus = max(n, sub_bus);
+ sub_bus = max((unsigned int)n, sub_bus);
pciauto_postscan_setup_bridge(hose, dev, sub_bus);
sub_bus = hose->current_busno;
space_avail =
current_urb->buffer_length -
current_urb->actual_length;
- popnum = min(space_avail, buf->size);
+ popnum = min(space_avail, (int)buf->size);
if (popnum == 0)
break;
spi_cs_deactivate(slave);
return 0;
}
- buf_len = 2 * cmd_len + min(data_len, max_tran_len);
+ buf_len = 2 * cmd_len + min(data_len, (size_t)max_tran_len);
len = cmd_len + data_len;
rx_offset = cmd_len;
buffer = (unsigned char *)malloc(buf_len);
if (data_in)
din = buffer + rx_offset;
dout = buffer;
- tran_len = min(data_len , max_tran_len);
+ tran_len = min(data_len, (size_t)max_tran_len);
num_blks = DIV_ROUND_UP(tran_len + cmd_len, 4);
num_bytes = (tran_len + cmd_len) % 4;
fsl->data_len = tran_len + cmd_len;
tmp = reg_read(®s->rxdata);
data = cpu_to_be32(tmp);
debug("SPI Rx: 0x%x 0x%x\n", tmp, data);
- cnt = min(nbytes, sizeof(data));
+ cnt = min_t(u32, nbytes, sizeof(data));
if (din) {
memcpy(din, &data, cnt);
din += cnt;
speed = slave->max_hz;
if (spi->max_hz) {
if (speed)
- speed = min(speed, spi->max_hz);
+ speed = min(speed, (int)spi->max_hz);
else
speed = spi->max_hz;
}
* changes to zero exactly after the last byte is fed into the
* FIFO.
*/
- count = min(burst, len - offset - 1);
+ count = min((u32)burst, len - offset - 1);
while (count--)
tpm_write_byte(data[offset++],
&lpc_tpm_dev[locality].data);
if (!gadget_is_dualspeed(gadget))
break;
device_qual(cdev);
- value = min(w_length,
- sizeof(struct usb_qualifier_descriptor));
+ value = min_t(int, w_length,
+ sizeof(struct usb_qualifier_descriptor));
break;
case USB_DT_OTHER_SPEED_CONFIG:
if (!gadget_is_dualspeed(gadget))
UDCDBGA("urb->buffer %p, buffer_length %d, actual_length %d",
urb->buffer, urb->buffer_length, urb->actual_length);
- last = min(urb->actual_length - endpoint->sent,
- endpoint->tx_packetSize);
+ last = min_t(u32, urb->actual_length - endpoint->sent,
+ endpoint->tx_packetSize);
if (last) {
u8 *cp = urb->buffer + endpoint->sent;
if (!urb || !urb->actual_length)
return -1;
- n = min(urb->actual_length - endpoint->sent, endpoint->tx_packetSize);
+ n = min_t(unsigned int, urb->actual_length - endpoint->sent,
+ endpoint->tx_packetSize);
if (n <= 0)
return -1;
u32 ep_num = ep_index(ep);
buf = req->req.buf + req->req.actual;
- length = min(req->req.length - req->req.actual,
- ep_num ? DMA_BUFFER_SIZE : ep->ep.maxpacket);
+ length = min_t(u32, req->req.length - req->req.actual,
+ ep_num ? DMA_BUFFER_SIZE : ep->ep.maxpacket);
ep->len = length;
ep->dma_buf = buf;
case 0:
switch (wValue & 0xff00) {
case 0x0100: /* device descriptor */
- len = min3(txlen, sizeof(root_hub_dev_des), wLength);
+ len = min3(txlen, (int)sizeof(root_hub_dev_des), (int)wLength);
memcpy(buffer, root_hub_dev_des, len);
break;
case 0x0200: /* configuration descriptor */
- len = min3(txlen, sizeof(root_hub_config_des), wLength);
+ len = min3(txlen, (int)sizeof(root_hub_config_des), (int)wLength);
memcpy(buffer, root_hub_config_des, len);
break;
case 0x0300: /* string descriptors */
switch (wValue & 0xff) {
case 0x00:
- len = min3(txlen, sizeof(root_hub_str_index0),
- wLength);
+ len = min3(txlen, (int)sizeof(root_hub_str_index0),
+ (int)wLength);
memcpy(buffer, root_hub_str_index0, len);
break;
case 0x01:
- len = min3(txlen, sizeof(root_hub_str_index1),
- wLength);
+ len = min3(txlen, (int)sizeof(root_hub_str_index1),
+ (int)wLength);
memcpy(buffer, root_hub_str_index1, len);
break;
}
data[10] = data[9];
}
- len = min3(txlen, data[0], wLength);
+ len = min3(txlen, (int)data[0], (int)wLength);
memcpy(buffer, data, len);
break;
default:
}
mdelay(1);
- len = min3(srclen, le16_to_cpu(req->length), length);
+ len = min3(srclen, (int)le16_to_cpu(req->length), length);
if (srcptr != NULL && len > 0)
memcpy(buffer, srcptr, len);
else
union xhci_trb *event, int length)
{
udev->act_len = min(length, length -
- EVENT_TRB_LEN(le32_to_cpu(event->trans_event.transfer_len)));
+ (int)EVENT_TRB_LEN(le32_to_cpu(event->trans_event.transfer_len)));
switch (GET_COMP_CODE(le32_to_cpu(event->trans_event.transfer_len))) {
case COMP_SUCCESS:
debug("scrlen = %d\n req->length = %d\n",
srclen, le16_to_cpu(req->length));
- len = min(srclen, le16_to_cpu(req->length));
+ len = min(srclen, (int)le16_to_cpu(req->length));
if (srcptr != NULL && len > 0)
memcpy(buffer, srcptr, len);
#ifdef CONFIG_SPLASH_SCREEN_ALIGN
if (x == BMP_ALIGN_CENTER)
- x = max(0, (VIDEO_VISIBLE_COLS - width) / 2);
+ x = max(0, (int)(VIDEO_VISIBLE_COLS - width) / 2);
else if (x < 0)
- x = max(0, VIDEO_VISIBLE_COLS - width + x + 1);
+ x = max(0, (int)(VIDEO_VISIBLE_COLS - width + x + 1));
if (y == BMP_ALIGN_CENTER)
- y = max(0, (VIDEO_VISIBLE_ROWS - height) / 2);
+ y = max(0, (int)(VIDEO_VISIBLE_ROWS - height) / 2);
else if (y < 0)
- y = max(0, VIDEO_VISIBLE_ROWS - height + y + 1);
+ y = max(0, (int)(VIDEO_VISIBLE_ROWS - height + y + 1));
#endif /* CONFIG_SPLASH_SCREEN_ALIGN */
/*
#ifdef CONFIG_SPLASH_SCREEN_ALIGN
if (x == BMP_ALIGN_CENTER)
- x = max(0, (VIDEO_VISIBLE_COLS - VIDEO_LOGO_WIDTH) / 2);
+ x = max(0, (int)(VIDEO_VISIBLE_COLS - VIDEO_LOGO_WIDTH) / 2);
else if (x < 0)
- x = max(0, VIDEO_VISIBLE_COLS - VIDEO_LOGO_WIDTH + x + 1);
+ x = max(0, (int)(VIDEO_VISIBLE_COLS - VIDEO_LOGO_WIDTH + x + 1));
if (y == BMP_ALIGN_CENTER)
- y = max(0, (VIDEO_VISIBLE_ROWS - VIDEO_LOGO_HEIGHT) / 2);
+ y = max(0, (int)(VIDEO_VISIBLE_ROWS - VIDEO_LOGO_HEIGHT) / 2);
else if (y < 0)
- y = max(0, VIDEO_VISIBLE_ROWS - VIDEO_LOGO_HEIGHT + y + 1);
+ y = max(0, (int)(VIDEO_VISIBLE_ROWS - VIDEO_LOGO_HEIGHT + y + 1));
#endif /* CONFIG_SPLASH_SCREEN_ALIGN */
dest = (unsigned char *)screen + (y * width + x) * VIDEO_PIXEL_SIZE;
* we need to adjust the logo height
*/
if (video_logo_ypos == BMP_ALIGN_CENTER)
- video_logo_height += max(0, (VIDEO_VISIBLE_ROWS - \
+ video_logo_height += max(0, (int)(VIDEO_VISIBLE_ROWS -
VIDEO_LOGO_HEIGHT) / 2);
else if (video_logo_ypos > 0)
video_logo_height += video_logo_ypos;
debug(" <" LBAFU ", %d, %d>\n", sector, byte_offset, byte_len);
if (byte_offset != 0) {
+ int readlen;
/* read first part which isn't aligned with start of sector */
if (ext4fs_block_dev_desc->
block_read(ext4fs_block_dev_desc->dev,
printf(" ** ext2fs_devread() read error **\n");
return 0;
}
- memcpy(buf, sec_buf + byte_offset,
- min(ext4fs_block_dev_desc->blksz
- - byte_offset, byte_len));
- buf += min(ext4fs_block_dev_desc->blksz
- - byte_offset, byte_len);
- byte_len -= min(ext4fs_block_dev_desc->blksz
- - byte_offset, byte_len);
+ readlen = min((int)ext4fs_block_dev_desc->blksz - byte_offset,
+ byte_len);
+ memcpy(buf, sec_buf + byte_offset, readlen);
+ buf += readlen;
+ byte_len -= readlen;
sector++;
}
/* align to beginning of next cluster if any */
if (pos) {
- actsize = min(filesize, bytesperclust);
+ actsize = min(filesize, (unsigned long)bytesperclust);
if (get_cluster(mydata, curclust, get_contents_vfatname_block,
(int)actsize) != 0) {
printf("Error reading cluster\n");
#define min(x, y) ({ \
typeof(x) _min1 = (x); \
typeof(y) _min2 = (y); \
+ (void) (&_min1 == &_min2); \
_min1 < _min2 ? _min1 : _min2; })
#define max(x, y) ({ \
typeof(x) _max1 = (x); \
typeof(y) _max2 = (y); \
+ (void) (&_max1 == &_max2); \
_max1 > _max2 ? _max1 : _max2; })
-#define min3(x, y, z) ({ \
- typeof(x) _min1 = (x); \
- typeof(y) _min2 = (y); \
- typeof(z) _min3 = (z); \
- _min1 < _min2 ? (_min1 < _min3 ? _min1 : _min3) : \
- (_min2 < _min3 ? _min2 : _min3); })
-
-#define max3(x, y, z) ({ \
- typeof(x) _max1 = (x); \
- typeof(y) _max2 = (y); \
- typeof(z) _max3 = (z); \
- _max1 > _max2 ? (_max1 > _max3 ? _max1 : _max3) : \
- (_max2 > _max3 ? _max2 : _max3); })
+#define min3(x, y, z) min((typeof(x))min(x, y), z)
+#define max3(x, y, z) max((typeof(x))max(x, y), z)
/**
* min_not_zero - return the minimum that is _not_ zero, unless both are zero
projects / project / bcm63xx / u-boot.git / commitdiff