ramips: add preliminary support for 2.6.32

SVN-Revision: 19343

diff --git a/target/linux/ramips/patches-2.6.32/001-mips-add-cp0-compare-irq-function.patch b/target/linux/ramips/patches-2.6.32/001-mips-add-cp0-compare-irq-function.patch
new file mode 100644 (file)
index 0000000..babe906
--- /dev/null
+++ b/target/linux/ramips/patches-2.6.32/001-mips-add-cp0-compare-irq-function.patch
@@ -0,0 +1,29 @@
+--- a/arch/mips/kernel/traps.c
++++ b/arch/mips/kernel/traps.c
+@@ -48,6 +48,7 @@
+ #include <asm/types.h>
+ #include <asm/stacktrace.h>
+ #include <asm/irq.h>
++#include <asm/time.h>
+ 
+ extern void check_wait(void);
+ extern asmlinkage void r4k_wait(void);
+@@ -1537,6 +1538,8 @@ void __cpuinit per_cpu_trap_init(void)
+        */
+       if (cpu_has_mips_r2) {
+               cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
++              if (get_c0_compare_irq)
++                      cp0_compare_irq = get_c0_compare_irq();
+               cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
+               if (cp0_perfcount_irq == cp0_compare_irq)
+                       cp0_perfcount_irq = -1;
+--- a/arch/mips/include/asm/time.h
++++ b/arch/mips/include/asm/time.h
+@@ -52,6 +52,7 @@ extern int (*perf_irq)(void);
+  */
+ #ifdef CONFIG_CEVT_R4K_LIB
+ extern unsigned int __weak get_c0_compare_int(void);
++extern unsigned int __weak get_c0_compare_irq(void);
+ extern int r4k_clockevent_init(void);
+ #endif
+ 

diff --git a/target/linux/ramips/patches-2.6.32/002-mips-clocksource-init-war.patch b/target/linux/ramips/patches-2.6.32/002-mips-clocksource-init-war.patch
new file mode 100644 (file)
index 0000000..894eed1
--- /dev/null
+++ b/target/linux/ramips/patches-2.6.32/002-mips-clocksource-init-war.patch
@@ -0,0 +1,56 @@
+--- a/arch/mips/kernel/cevt-r4k.c
++++ b/arch/mips/kernel/cevt-r4k.c
+@@ -16,6 +16,22 @@
+ #include <asm/cevt-r4k.h>
+ 
+ /*
++ * Compare interrupt can be routed and latched outside the core,
++ * so a single execution hazard barrier may not be enough to give
++ * it time to clear as seen in the Cause register.  4 time the
++ * pipeline depth seems reasonably conservative, and empirically
++ * works better in configurations with high CPU/bus clock ratios.
++ */
++
++#define compare_change_hazard() \
++      do { \
++              irq_disable_hazard(); \
++              irq_disable_hazard(); \
++              irq_disable_hazard(); \
++              irq_disable_hazard(); \
++      } while (0)
++
++/*
+  * The SMTC Kernel for the 34K, 1004K, et. al. replaces several
+  * of these routines with SMTC-specific variants.
+  */
+@@ -31,6 +47,7 @@ static int mips_next_event(unsigned long
+       cnt = read_c0_count();
+       cnt += delta;
+       write_c0_compare(cnt);
++      compare_change_hazard();
+       res = ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0;
+       return res;
+ }
+@@ -100,22 +117,6 @@ static int c0_compare_int_pending(void)
+       return (read_c0_cause() >> cp0_compare_irq) & 0x100;
+ }
+ 
+-/*
+- * Compare interrupt can be routed and latched outside the core,
+- * so a single execution hazard barrier may not be enough to give
+- * it time to clear as seen in the Cause register.  4 time the
+- * pipeline depth seems reasonably conservative, and empirically
+- * works better in configurations with high CPU/bus clock ratios.
+- */
+-
+-#define compare_change_hazard() \
+-      do { \
+-              irq_disable_hazard(); \
+-              irq_disable_hazard(); \
+-              irq_disable_hazard(); \
+-              irq_disable_hazard(); \
+-      } while (0)
+-
+ int c0_compare_int_usable(void)
+ {
+       unsigned int delta;

diff --git a/target/linux/ramips/patches-2.6.32/010-mtd_fix_cfi_cmdset_0002_erase_status_check.patch b/target/linux/ramips/patches-2.6.32/010-mtd_fix_cfi_cmdset_0002_erase_status_check.patch
new file mode 100644 (file)
index 0000000..22aefe0
--- /dev/null
+++ b/target/linux/ramips/patches-2.6.32/010-mtd_fix_cfi_cmdset_0002_erase_status_check.patch
@@ -0,0 +1,20 @@
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -1568,7 +1568,7 @@ static int __xipram do_erase_chip(struct
+                       chip->erase_suspended = 0;
+               }
+ 
+-              if (chip_ready(map, adr))
++              if (chip_good(map, adr, map_word_ff(map)))
+                       break;
+ 
+               if (time_after(jiffies, timeo)) {
+@@ -1656,7 +1656,7 @@ static int __xipram do_erase_oneblock(st
+                       chip->erase_suspended = 0;
+               }
+ 
+-              if (chip_ready(map, adr)) {
++              if (chip_good(map, adr, map_word_ff(map))) {
+                       xip_enable(map, chip, adr);
+                       break;
+               }

diff --git a/target/linux/ramips/patches-2.6.32/100-mips-ralink-core.patch b/target/linux/ramips/patches-2.6.32/100-mips-ralink-core.patch
new file mode 100644 (file)
index 0000000..5bf5f34
--- /dev/null
+++ b/target/linux/ramips/patches-2.6.32/100-mips-ralink-core.patch
@@ -0,0 +1,58 @@
+--- a/arch/mips/Makefile
++++ b/arch/mips/Makefile
+@@ -624,6 +624,26 @@ else
+ load-$(CONFIG_CPU_CAVIUM_OCTEON)      += 0xffffffff81100000
+ endif
+ 
++#
++# Ralink SoC common stuff
++#
++core-$(CONFIG_MIPS_RALINK)    += arch/mips/ralink/common/
++cflags-$(CONFIG_MIPS_RALINK)  += -I$(srctree)/arch/mips/include/asm/mach-ralink
++
++#
++# Ralink RT288x
++#
++core-$(CONFIG_RALINK_RT288X)  += arch/mips/ralink/rt288x/
++cflags-$(CONFIG_RALINK_RT288X)        += -I$(srctree)//arch/mips/include/asm/mach-ralink/rt288x
++load-$(CONFIG_RALINK_RT288X)  += 0xffffffff88000000
++
++#
++# Ralink RT305x
++#
++core-$(CONFIG_RALINK_RT305X)  += arch/mips/ralink/rt305x/
++cflags-$(CONFIG_RALINK_RT305X)        += -I$(srctree)/arch/mips/include/asm/mach-ralink/rt305x
++load-$(CONFIG_RALINK_RT305X)  += 0xffffffff80000000
++
+ # temporary until string.h is fixed
+ cflags-y += -ffreestanding
+ 
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -43,6 +43,9 @@ config AR7
+         Support for the Texas Instruments AR7 System-on-a-Chip
+         family: TNETD7100, 7200 and 7300.
+ 
++config MIPS_RALINK
++      bool "Ralink MIPS SoC based boards"
++
+ config BASLER_EXCITE
+       bool "Basler eXcite smart camera"
+       select CEVT_R4K
+@@ -679,6 +682,7 @@ source "arch/mips/bcm63xx/Kconfig"
+ source "arch/mips/jazz/Kconfig"
+ source "arch/mips/lasat/Kconfig"
+ source "arch/mips/pmc-sierra/Kconfig"
++source "arch/mips/ralink/Kconfig"
+ source "arch/mips/sgi-ip27/Kconfig"
+ source "arch/mips/sibyte/Kconfig"
+ source "arch/mips/txx9/Kconfig"
+@@ -1045,7 +1049,7 @@ config BOOT_ELF32
+ 
+ config MIPS_L1_CACHE_SHIFT
+       int
+-      default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL
++      default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL || RALINK_RT288X
+       default "6" if MIPS_CPU_SCACHE
+       default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON
+       default "5"

diff --git a/target/linux/ramips/patches-2.6.32/101-rt288x_serial_driver_hack.patch b/target/linux/ramips/patches-2.6.32/101-rt288x_serial_driver_hack.patch
new file mode 100644 (file)
index 0000000..06d921f
--- /dev/null
+++ b/target/linux/ramips/patches-2.6.32/101-rt288x_serial_driver_hack.patch
@@ -0,0 +1,118 @@
+--- a/drivers/serial/8250.c
++++ b/drivers/serial/8250.c
+@@ -298,9 +298,9 @@ static const struct serial8250_config ua
+       },
+ };
+ 
+-#if defined (CONFIG_SERIAL_8250_AU1X00)
++#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
+ 
+-/* Au1x00 UART hardware has a weird register layout */
++/* Au1x00 and RT288x UART hardware has a weird register layout */
+ static const u8 au_io_in_map[] = {
+       [UART_RX]  = 0,
+       [UART_IER] = 2,
+@@ -418,7 +418,7 @@ static unsigned int mem32_serial_in(stru
+       return readl(p->membase + offset);
+ }
+ 
+-#ifdef CONFIG_SERIAL_8250_AU1X00
++#if defined(CONFIG_SERIAL_8250_AU1X00) || defined(CONFIG_SERIAL_8250_RT288X)
+ static unsigned int au_serial_in(struct uart_port *p, int offset)
+ {
+       offset = map_8250_in_reg(p, offset) << p->regshift;
+@@ -499,7 +499,7 @@ static void set_io_from_upio(struct uart
+               p->serial_out = mem32_serial_out;
+               break;
+ 
+-#ifdef CONFIG_SERIAL_8250_AU1X00
++#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
+       case UPIO_AU:
+               p->serial_in = au_serial_in;
+               p->serial_out = au_serial_out;
+@@ -531,7 +531,7 @@ serial_out_sync(struct uart_8250_port *u
+       switch (p->iotype) {
+       case UPIO_MEM:
+       case UPIO_MEM32:
+-#ifdef CONFIG_SERIAL_8250_AU1X00
++#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
+       case UPIO_AU:
+ #endif
+       case UPIO_DWAPB:
+@@ -569,8 +569,8 @@ static inline void _serial_dl_write(stru
+       serial_outp(up, UART_DLM, value >> 8 & 0xff);
+ }
+ 
+-#if defined(CONFIG_SERIAL_8250_AU1X00)
+-/* Au1x00 haven't got a standard divisor latch */
++#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
++/* Au1x00 and RT288x haven't got a standard divisor latch */
+ static int serial_dl_read(struct uart_8250_port *up)
+ {
+       if (up->port.iotype == UPIO_AU)
+@@ -777,22 +777,19 @@ static int size_fifo(struct uart_8250_po
+  */
+ static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
+ {
+-      unsigned char old_dll, old_dlm, old_lcr;
++      unsigned char old_lcr;
++      unsigned int old_dl;
+       unsigned int id;
+ 
+       old_lcr = serial_inp(p, UART_LCR);
+       serial_outp(p, UART_LCR, UART_LCR_DLAB);
+ 
+-      old_dll = serial_inp(p, UART_DLL);
+-      old_dlm = serial_inp(p, UART_DLM);
++      old_dl = serial_dl_read(p);
+ 
+-      serial_outp(p, UART_DLL, 0);
+-      serial_outp(p, UART_DLM, 0);
++      serial_dl_write(p, 0);
++      id = serial_dl_read(p);
+ 
+-      id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
+-
+-      serial_outp(p, UART_DLL, old_dll);
+-      serial_outp(p, UART_DLM, old_dlm);
++      serial_dl_write(p, old_dl);
+       serial_outp(p, UART_LCR, old_lcr);
+ 
+       return id;
+@@ -1214,7 +1211,7 @@ static void autoconfig(struct uart_8250_
+       }
+ #endif
+ 
+-#ifdef CONFIG_SERIAL_8250_AU1X00
++#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
+       /* if access method is AU, it is a 16550 with a quirk */
+       if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
+               up->bugs |= UART_BUG_NOMSR;
+--- a/drivers/serial/Kconfig
++++ b/drivers/serial/Kconfig
+@@ -266,6 +266,14 @@ config SERIAL_8250_AU1X00
+         say Y to this option. The driver can handle up to 4 serial ports,
+         depending on the SOC. If unsure, say N.
+ 
++config SERIAL_8250_RT288X
++      bool "Ralink RT288x/RT305x serial port support"
++      depends on SERIAL_8250 != n && (SOC_RT288X || SOC_RT305X)
++      help
++        If you have a Ralink RT288x/RT305x SoC based board and want to use the 
++        serial port, say Y to this option. The driver can handle up to 2 serial 
++        ports. If unsure, say N.
++
+ config SERIAL_8250_RM9K
+       bool "Support for MIPS RM9xxx integrated serial port"
+       depends on SERIAL_8250 != n && SERIAL_RM9000
+--- a/include/linux/serial_core.h
++++ b/include/linux/serial_core.h
+@@ -281,7 +281,7 @@ struct uart_port {
+ #define UPIO_HUB6             (1)
+ #define UPIO_MEM              (2)
+ #define UPIO_MEM32            (3)
+-#define UPIO_AU                       (4)                     /* Au1x00 type IO */
++#define UPIO_AU                       (4)                     /* Au1x00 and RT288x type IO */
+ #define UPIO_TSI              (5)                     /* Tsi108/109 type IO */
+ #define UPIO_DWAPB            (6)                     /* DesignWare APB UART */
+ #define UPIO_RM9000           (7)                     /* RM9000 type IO */

diff --git a/target/linux/ramips/patches-2.6.32/102-rt288x-pci-driver-hook.patch b/target/linux/ramips/patches-2.6.32/102-rt288x-pci-driver-hook.patch
new file mode 100644 (file)
index 0000000..d2056c6
--- /dev/null
+++ b/target/linux/ramips/patches-2.6.32/102-rt288x-pci-driver-hook.patch
@@ -0,0 +1,10 @@
+--- a/arch/mips/pci/Makefile
++++ b/arch/mips/pci/Makefile
+@@ -55,6 +55,7 @@ obj-$(CONFIG_ZAO_CAPCELLA)   += fixup-capc
+ obj-$(CONFIG_WR_PPMC)         += fixup-wrppmc.o
+ obj-$(CONFIG_MIKROTIK_RB532)  += pci-rc32434.o ops-rc32434.o fixup-rc32434.o
+ obj-$(CONFIG_CPU_CAVIUM_OCTEON)       += pci-octeon.o pcie-octeon.o
++obj-$(CONFIG_SOC_RT288X)      += pci-rt288x.o
+ 
+ ifdef CONFIG_PCI_MSI
+ obj-$(CONFIG_CPU_CAVIUM_OCTEON)       += msi-octeon.o

diff --git a/target/linux/ramips/patches-2.6.32/103-ethernet.patch b/target/linux/ramips/patches-2.6.32/103-ethernet.patch
new file mode 100644 (file)
index 0000000..8b370b6
--- /dev/null
+++ b/target/linux/ramips/patches-2.6.32/103-ethernet.patch
@@ -0,0 +1,25 @@
+--- a/drivers/net/Kconfig
++++ b/drivers/net/Kconfig
+@@ -602,6 +602,12 @@ config MIPS_AU1X00_ENET
+         If you have an Alchemy Semi AU1X00 based system
+         say Y.  Otherwise, say N.
+ 
++config MIPS_RAMIPS_NET
++      tristate "Ethernet driver for rt288x/rt305x"
++      depends on MIPS_RALINK
++      help
++        This driver supports the etehrnet mac inside the ralink wisocs
++
+ config SGI_IOC3_ETH
+       bool "SGI IOC3 Ethernet"
+       depends on PCI && SGI_IP27
+--- a/drivers/net/Makefile
++++ b/drivers/net/Makefile
+@@ -217,6 +217,7 @@ obj-$(CONFIG_KORINA) += korina.o
+ obj-$(CONFIG_MIPS_JAZZ_SONIC) += jazzsonic.o
+ obj-$(CONFIG_MIPS_AU1X00_ENET) += au1000_eth.o
+ obj-$(CONFIG_MIPS_SIM_NET) += mipsnet.o
++obj-$(CONFIG_MIPS_RAMIPS_NET) += ramips.o
+ obj-$(CONFIG_SGI_IOC3_ETH) += ioc3-eth.o
+ obj-$(CONFIG_DECLANCE) += declance.o
+ obj-$(CONFIG_ATARILANCE) += atarilance.o

diff --git a/target/linux/ramips/rt288x/config-2.6.32 b/target/linux/ramips/rt288x/config-2.6.32
new file mode 100644 (file)
index 0000000..e0e0e16
--- /dev/null
+++ b/target/linux/ramips/rt288x/config-2.6.32
@@ -0,0 +1,155 @@
+CONFIG_32BIT=y
+# CONFIG_64BIT is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+# CONFIG_AR7 is not set
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_BCM47XX is not set
+# CONFIG_BCM63XX is not set
+CONFIG_BITREVERSE=y
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_CEVT_R4K=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
+CONFIG_CMDLINE="console=ttyS1,57600 rootfstype=squashfs,jffs2"
+# CONFIG_CPU_BIG_ENDIAN is not set
+# CONFIG_CPU_CAVIUM_OCTEON is not set
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_LOONGSON2E is not set
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS32_R1 is not set
+CONFIG_CPU_MIPS32_R2=y
+# CONFIG_CPU_MIPS64_R1 is not set
+# CONFIG_CPU_MIPS64_R2 is not set
+CONFIG_CPU_MIPSR2=y
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R5500 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_VR41XX is not set
+CONFIG_CSRC_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DEVPORT=y
+# CONFIG_DM9000 is not set
+CONFIG_DMA_NEED_PCI_MAP_STATE=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_FSNOTIFY is not set
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_HARDWARE_WATCHPOINTS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HW_HAS_PCI=y
+CONFIG_HW_RANDOM=m
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IRQ_CPU=y
+# CONFIG_ISDN is not set
+# CONFIG_LEDS_GPIO is not set
+# CONFIG_MACH_ALCHEMY is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_LOONGSON is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_MII is not set
+# CONFIG_MIKROTIK_RB532 is not set
+CONFIG_MIPS=y
+# CONFIG_MIPS_COBALT is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=4
+CONFIG_MIPS_MACHINE=y
+# CONFIG_MIPS_MALTA is not set
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_MIPS_MT_SMP is not set
+# CONFIG_MIPS_MT_SMTC is not set
+CONFIG_MIPS_RALINK=y
+# CONFIG_MIPS_RAMIPS_NET is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_NO_IOPORT is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PHYLIB=y
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PROBE_INITRD_HEADER is not set
+CONFIG_RALINK_DEV_GPIO_LEDS=y
+CONFIG_RALINK_RT288X=y
+# CONFIG_RALINK_RT305X is not set
+CONFIG_RT288X_MACH_RT_N15=y
+CONFIG_RT288X_MACH_WZR_AGL300NH=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SERIAL_8250_EXTENDED is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RT288X=y
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+CONFIG_SOC_RT288X=y
+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
+CONFIG_SYS_HAS_CPU_MIPS32_R2=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+# CONFIG_TC35815 is not set
+CONFIG_TRAD_SIGNALS=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+CONFIG_USB_SUPPORT=y
+CONFIG_ZONE_DMA_FLAG=0

diff --git a/target/linux/ramips/rt305x/config-2.6.32 b/target/linux/ramips/rt305x/config-2.6.32
new file mode 100644 (file)
index 0000000..76e97e3
--- /dev/null
+++ b/target/linux/ramips/rt305x/config-2.6.32
@@ -0,0 +1,155 @@
+CONFIG_32BIT=y
+# CONFIG_64BIT is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+# CONFIG_AR7 is not set
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_BCM47XX is not set
+# CONFIG_BCM63XX is not set
+CONFIG_BITREVERSE=y
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_CEVT_R4K=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
+CONFIG_CMDLINE="console=ttyS1,57600 rootfstype=squashfs,jffs2"
+# CONFIG_CPU_BIG_ENDIAN is not set
+# CONFIG_CPU_CAVIUM_OCTEON is not set
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_LOONGSON2E is not set
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS32_R1 is not set
+CONFIG_CPU_MIPS32_R2=y
+# CONFIG_CPU_MIPS64_R1 is not set
+# CONFIG_CPU_MIPS64_R2 is not set
+CONFIG_CPU_MIPSR2=y
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R5500 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_VR41XX is not set
+CONFIG_CSRC_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_DECOMPRESS_LZMA=y
+# CONFIG_DM9000 is not set
+CONFIG_DMA_NEED_PCI_MAP_STATE=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_EARLY_PRINTK=y
+# CONFIG_FSNOTIFY is not set
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_HARDWARE_WATCHPOINTS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HW_RANDOM=m
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IRQ_CPU=y
+# CONFIG_ISDN is not set
+# CONFIG_LEDS_GPIO is not set
+# CONFIG_MACH_ALCHEMY is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_LOONGSON is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_MII is not set
+# CONFIG_MIKROTIK_RB532 is not set
+CONFIG_MIPS=y
+# CONFIG_MIPS_COBALT is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_MIPS_MACHINE=y
+# CONFIG_MIPS_MALTA is not set
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_MIPS_MT_SMP is not set
+# CONFIG_MIPS_MT_SMTC is not set
+CONFIG_MIPS_RALINK=y
+CONFIG_MIPS_RAMIPS_NET=y
+# CONFIG_MIPS_SIM is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_NO_IOPORT is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_PHYLIB=y
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PROBE_INITRD_HEADER is not set
+CONFIG_RALINK_DEV_GPIO_LEDS=y
+# CONFIG_RALINK_RT288X is not set
+CONFIG_RALINK_RT305X=y
+CONFIG_RT305X_MACH_DIR_300_REVB=y
+CONFIG_RT305X_MACH_FONERA20N=y
+CONFIG_RT305X_MACH_V22RW_2X2=y
+CONFIG_RT305X_MACH_WHR_G300N=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SERIAL_8250_EXTENDED is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RT288X=y
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+CONFIG_SOC_RT305X=y
+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
+CONFIG_SYS_HAS_CPU_MIPS32_R2=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_TRAD_SIGNALS=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_ZONE_DMA_FLAG=0