arm64: dts: sdm845: Redefine interconnect provider DT nodes

Add the DT nodes for each of the Network-On-Chip interconnect
buses found on SDM845 based platform and redefine the rsc_hlos
child node as a bcm-voter device to better represent the hardware.

Reviewed-by: Evan Green <evgreen@chromium.org>
Acked-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: David Dai <daidavid1@codeaurora.org>
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200209183411.17195-7-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index ed882e086ba736baa4a428fb8bb3c336ba1658dc..3da382b502e95abeaed92f89b5bd9fa53129857b 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1576,6 +1576,55 @@
                        };
                };
 
+               mem_noc: interconnect@1380000 {
+                       compatible = "qcom,sdm845-mem-noc";
+                       reg = <0 0x01380000 0 0x27200>;
+                       #interconnect-cells = <1>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
+               dc_noc: interconnect@14e0000 {
+                       compatible = "qcom,sdm845-dc-noc";
+                       reg = <0 0x014e0000 0 0x400>;
+                       #interconnect-cells = <1>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
+               config_noc: interconnect@1500000 {
+                       compatible = "qcom,sdm845-config-noc";
+                       reg = <0 0x01500000 0 0x5080>;
+                       #interconnect-cells = <1>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
+               system_noc: interconnect@1620000 {
+                       compatible = "qcom,sdm845-system-noc";
+                       reg = <0 0x01620000 0 0x18080>;
+                       #interconnect-cells = <1>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
+               aggre1_noc: interconnect@16e0000 {
+                       compatible = "qcom,sdm845-aggre1-noc";
+                       reg = <0 0x016e0000 0 0x15080>;
+                       #interconnect-cells = <1>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
+               aggre2_noc: interconnect@1700000 {
+                       compatible = "qcom,sdm845-aggre2-noc";
+                       reg = <0 0x01700000 0 0x1f300>;
+                       #interconnect-cells = <1>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
+               mmss_noc: interconnect@1740000 {
+                       compatible = "qcom,sdm845-mmss-noc";
+                       reg = <0 0x01740000 0 0x1c100>;
+                       #interconnect-cells = <1>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
                ufs_mem_hc: ufshc@1d84000 {
                        compatible = "qcom,sdm845-ufshc", "qcom,ufshc",
                                     "jedec,ufs-2.0";
@@ -3335,6 +3384,13 @@
                        status = "disabled";
                };
 
+               gladiator_noc: interconnect@17900000 {
+                       compatible = "qcom,sdm845-gladiator-noc";
+                       reg = <0 0x17900000 0 0xd080>;
+                       #interconnect-cells = <1>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
                watchdog@17980000 {
                        compatible = "qcom,apss-wdt-sdm845", "qcom,kpss-wdt";
                        reg = <0 0x17980000 0 0x1000>;
@@ -3364,6 +3420,10 @@
                                          <WAKE_TCS    3>,
                                          <CONTROL_TCS 1>;
 
+                       apps_bcm_voter: bcm-voter {
+                               compatible = "qcom,bcm-voter";
+                       };
+
                        rpmhcc: clock-controller {
                                compatible = "qcom,sdm845-rpmh-clk";
                                #clock-cells = <1>;
@@ -3420,11 +3480,6 @@
                                        };
                                };
                        };
-
-                       rsc_hlos: interconnect {
-                               compatible = "qcom,sdm845-rsc-hlos";
-                               #interconnect-cells = <1>;
-                       };
                };
 
                intc: interrupt-controller@17a00000 {