--- /dev/null
+From patchwork Tue Jul 18 10:17:27 2017
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [6/9] MIPS: BCM63XX: allow NULL clock for clk_get_rate
+X-Patchwork-Submitter: Jonas Gorski <jonas.gorski@gmail.com>
+X-Patchwork-Id: 16776
+Message-Id: <20170718101730.2541-7-jonas.gorski@gmail.com>
+To: unlisted-recipients:; (no To-header on input)
+Cc: Ralf Baechle <ralf@linux-mips.org>,
+ Florian Fainelli <f.fainelli@gmail.com>,
+ bcm-kernel-feedback-list@broadcom.com,
+ James Hogan <james.hogan@imgtec.com>,
+ linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
+Date: Tue, 18 Jul 2017 12:17:27 +0200
+From: Jonas Gorski <jonas.gorski@gmail.com>
+List-Id: linux-mips <linux-mips.eddie.linux-mips.org>
+
+Make the behaviour of clk_get_rate consistent with common clk's
+clk_get_rate by accepting NULL clocks as parameter. Some device
+drivers rely on this, and will cause an OOPS otherwise.
+
+Fixes: e7300d04bd08 ("MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs.")
+Cc: Ralf Baechle <ralf@linux-mips.org>
+Cc: Florian Fainelli <f.fainelli@gmail.com>
+Cc: bcm-kernel-feedback-list@broadcom.com
+Cc: James Hogan <james.hogan@imgtec.com>
+Cc: linux-mips@linux-mips.org
+Cc: linux-kernel@vger.kernel.org
+Reported-by: Mathias Kresin <dev@kresin.me>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/mips/bcm63xx/clk.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -345,6 +345,9 @@ EXPORT_SYMBOL(clk_disable);
+
+ unsigned long clk_get_rate(struct clk *clk)
+ {
++ if (!clk)
++ return 0;
++
+ return clk->rate;
+ }
+
}
static struct clk clk_pcie = {
-@@ -386,9 +400,11 @@ struct clk *clk_get(struct device *dev,
+@@ -389,9 +403,11 @@ struct clk *clk_get(struct device *dev,
return &clk_periph;
if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm"))
return &clk_pcm;
return &clk_pcie;
return ERR_PTR(-ENOENT);
}
-@@ -411,6 +427,7 @@ static int __init bcm63xx_clk_init(void)
+@@ -414,6 +430,7 @@ static int __init bcm63xx_clk_init(void)
clk_hsspi.rate = HSSPI_PLL_HZ_6328;
break;
case BCM6362_CPU_ID: